? preliminary rf monolithics, inc. phone: (972) 233-2903 fax: (972) 387-9148 e-mail: info@rfm.com page 1 of 2 rfm europe phone: 44 1963 251383 fax: 44 1963 251510 http://www.rfm.com ?1999 by rf monolithics, inc. the stylized rfm logo are registered trademarks of rf monolithics, inc. SC3053B-071201 caution: electrostatic sensitive device. observe precautions for handling. notes: electrical characteristics characteristic sym notes minimum typical maximum units output frequency absolute frequency f o 1, 2 749.812 750.188 mhz tolerance from 700.000 mhz d f o 250 ppm q and q output voltage into 50 w (vswr 1.2) v o 1, 3 0.60 .85 v p-p operating load vswr 2:1 symmetry 3, 4, 5 49 51 % harmonic spurious 3, 4, 6 -25 -20 dbc nonharmonic spurious -60 dbc q and q period jitter no noise on v cc 3, 4, 6, 7 15 30 ps p-p 200 mv p-p from 1 mhz to 1/2 f o on 3, 4, 7, 8 35 ps p-p output (disabled) amplitude into 50 w 3, 9 75 mv p-p output dc resistance (between q & q ) 3 50 k w enable (terminal 14) input high voltage v ih 3, 9 v cc -0.1 v cc v cc +0.1 v input low voltage v il 0.0 0.20 v input high current i ih 3 5 ma input low current i il -1 ma propagation delay t pd 1 ms dc power supply operating voltage v cc 1, 3 +3.13 +3.30 +3.47 vdc operating current i cc 20 40 ma operating ambient temperature t a 1, 3 0 +70 c lid symbolization (yy = year, ww = week) rfm SC3053B yyww ? quartz saw frequency stability ? fundamental fixed frequency ? very low jitter and power consumption ? rugged, miniature, surface-mount case ? low-voltage power supply (3.3 vdc) this digital clock is designed for use with high-speed timing systems. fundamental-mode oscillation is made possible by surface-acoustic-wave (saw) technology. the design results in low jitter, compact size, and low power consumption. differential outputs provide a sine wave that is capable of driving 50 w loads. rating value units power supply voltage (v cc at terminal 1) 0 to +4.0 vdc input voltage (enable at terminal 8) 0 to +4.0 vdc case temperature (powered or storage) -40 to +85 c 750.0 mhz differential sine-wave clock SC3053B smc-8 case 1. unless otherwise noted, all specifications include any combination of load vswr, vcc, and ta. in addition, q and q are terminated into 50 w loads to ground. (see: typical test circuit.) 2. one or more of the following united states patents apply: 4,616,197; 4,670,681; 4,760,352. 3. the design, manufacturing process, and specifications of this device are subject to change without notice. 4. only under the nominal conditions of 50 w load impedance with vswr 1.2 and nominal power supply voltage. 5. symmetry is defined as the pulse width (in percent of total period) measured at the 50% points of q or q . (see: timing definitions.) 6. jitter and other spurious outputs induced by externally generated electrical noise on v cc or mechanical vibration are not included. dedicated external voltage regulation and careful pcb layout are recommended for optimum performance. 7. applies to period jitter of q and q . measurements are made with the tektronix csa803 signal analyzer with at least 1000 samples. 8. period jitter measured with a 200mv p-p sine wave swept from 1mhz to one-half of f o at the v cc power supply terminal. 9. the outputs are enabled when terminal 8 is at logic high. propagation delay is defined as the time from the 50% point on the rising edge of enable to the 90% point on the rising edge of the output amplitude or as the fall time from the 50% point to the 10% point. (see: timing definitions.)
750.0 mhz rf monolithics, inc. phone: (972) 233-2903 fax: (972) 387-9148 e-mail: info@rfm.com page 2 of 2 rfm europe phone: 44 1963 251383 fax: 44 1963 251510 http://www.rfm.com ?1999 by rf monolithics, inc. the stylized rfm logo are registered trademarks of rf monolithics, inc. SC3053B-071201 electrical connections case design all pads consist of 30 microinches (min) electroless gold on 50 micro- inches (min) electroless nickel over base metal. the metallic center pad was designed for mechanical support. grounding of this pad is optional. lid symbolization, including terminal 1 locator dot, are in contrasting ink. symbolization varies by model number. for purposes of illustration, only terminal 1 dot is shown. footprint actual size footprint: typical printed circuit board land pattern a typical land pattern for a circuit board is shown below. grounding of the metallic center pad is optional. . typical test circuit timing definitions 1 2 3 4 8 7 6 5 top view a b n j l (x2) d (x8) k (x8) c h g m (x3) e f typically 0.01" to 0.05" or 0.25 mm to 1.25 mm (8 places) (the optimum value of this dimension is dependent on the pcb assembly process employed.) clock under test q tektronix csa 803 digitizing oscilloscope ch 2 enable v cc q ch 1 50 w trigger * * * power splitter, mini-circuits zfsc2-4 0.1 m f sine-wave signal generator 4.7 m h 50 w 50 w v cc t pd propagation delay: 50% enable q or q output amplitude envelope 50% 90% 10% symmetry: 50% 50% q or q output 50% symmetry as % of period period symmetry as % of period t pd terminal number connection 1 v cc 2 ground 3 nc or ground 4 q output 5 q output 6 ground 7 8 enable lid ground dimensions millimeters inches min max min max a 13.46 13.97 0.530 0.550 b 9.14 9.66 0.360 0.380 c 2.05 nominal 0.081 nominal d 3.56 nominal 0.141 nominal e 2.24 nominal 0.088 nominal f 1.27 nominal 0.050 nominal g 2.54 nominal 0.100 nominal h 3.05 nominal 0.120 nominal j 1.93 nominal 0.076 nominal k 5.54 nominal 0.218 nominal l 4.32 nominal 0.170 nominal m 4.83 nominal 0.190 nominal n 0.50 nominal 0.020 nominal
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