? semiconductor components industries, llc, 2014 march, 2014 ? rev. 10 1 publication order number: NTMFS4833N/d NTMFS4833N power mosfet 30 v, 191 a, single n ? channel, so ? 8fl features ? low r ds(on) to minimize conduction losses ? low capacitance to minimize driver losses ? optimized gate charge to minimize switching losses ? these are pb ? free devices applications ? refer to application note and8195/d ? cpu power delivery ? dc ? dc converters ? low side switching maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain ? to ? source voltage v dss 30 v gate ? to ? source voltage v gs 20 v continuous drain current r ja (note 1) steady state t a = 25 c i d 28 a t a = 85 c 20.5 power dissipation r ja (note 1) t a = 25 c p d 2.7 w continuous drain current r ja (note 2) t a = 25 c id 16 a t a = 85 c 12 power dissipation r ja (note 2) t a = 25 c p d 1.1 w continuous drain current r jc (note 1) t c = 25 c i d 191 a t c = 85 c 138 power dissipation r jc (note 1) t c = 25 c p d 113.6 w pulsed drain current t a = 25 c, t p = 10 s i dm 288 a operating junction and storage temperature t j , t stg ? 55 to +150 c source current (body diode) i s 104 a drain to source dv/dt dv/dt 6 v/ns single pulse drain ? to ? source avalanche energy (t j = 25 c, v dd = 30 v, v gs = 10 v, i l = 35 a pk , l = 1.0 mh, r g = 25 eas 612.5 mj lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. surface ? mounted on fr4 board using 1 sq ? in pad, 1 oz cu. 2. surface ? mounted on fr4 board using the minimum recommended pad size. (cu area = 50 mm 2 [1 oz]) so ? 8 flat lead case 488aa style 1 marking diagram http://onsemi.com a = assembly location y = year w = work week zz = lot traceability 1 v (br)dss r ds(on) max i d max 30 v 2.0 m @ 10 v 191 a 3.0 m @ 4.5 v g (4) s (1,2,3) n ? channel mosfet d (5) device package shipping ? ordering information NTMFS4833Nt1g so ? 8fl (pb ? free) 1500/tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. NTMFS4833Nt3g so ? 8fl (pb ? free) 5000/tape & reel 4833n aywzz s s s g d d d d
NTMFS4833N http://onsemi.com 2 thermal resistance maximum ratings parameter symbol value unit junction ? to ? case (drain) r jc 1.1 c/w junction ? to ? ambient ? steady state (note 3) r ja 45.6 junction ? to ? ambient ? t < 10s (note 3) r ja 17.1 junction ? to ? ambient ? steady state (note 4) r ja 117.4 3. surface ? mounted on fr4 board using 1 sq ? in pad, 1 oz cu. 4. surface ? mounted on fr4 board using the minimum recommended pad size. (cu area = 50 mm 2 [1 oz]) electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 30 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss / t j 17 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 24 v t j = 25 c 1 a t j = 125 c 10 gate ? to ? source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 5) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.5 2.5 v negative threshold temperature coefficient v gs(th) /t j 7.12 mv/ c drain ? to ? source on resistance r ds(on) v gs = 10 v to 11.5 v i d = 30 a 1.3 2.0 m i d = 15 a 1.3 v gs = 4.5 v i d = 30 a 2.3 3.0 i d = 15 a 2.3 forward transconductance g fs v ds = 15 v, i d = 15 a 30 s charges, capacitances & gate resistance input capacitance c iss v gs = 0 v, f = 1 mhz, v ds = 12 v 5600 pf output capacitance c oss 1200 reverse transfer capacitance c rss 650 total gate charge q g(tot) v gs = 4.5 v, v ds = 15 v; i d = 30 a 39 58 nc threshold gate charge q g(th) 6.0 gate ? to ? source charge q gs 16 gate ? to ? drain charge q gd 17 total gate charge q g(tot) v gs = 11.5 v, v ds = 15 v; i d = 30 a 88 nc switching characteristics (note 6) turn ? on delay time t d(on) v gs = 4.5 v, v ds = 15 v, i d = 15 a, r g = 3.0 25 ns rise time t r 34 turn ? off delay time t d(off) 35 fall time t f 17 turn ? on delay time t d(on) v gs = 11.5 v, v ds = 15 v, i d = 15 a, r g = 3.0 14 ns rise time t r 19 turn ? off delay time t d(off) 50 fall time t f 10 5. pulse test: pulse width 300 s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures.
NTMFS4833N http://onsemi.com 3 electrical characteristics (t j = 25 c unless otherwise specified) parameter unit max typ min test condition symbol drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 30 a t j = 25 c ? 0.8 1.0 v t j = 125 c ? 0.68 ? reverse recovery time t rr v gs = 0 v, dis/dt = 100 a/ s, i s = 30 a ? 38 ? ns charge time t a ? 19 ? discharge time t b ? 19 ? reverse recovery charge q rr ? 36 ? nc package parasitic values source inductance l s t a = 25 c ? 0.50 ? nh drain inductance l d ? 0.005 ? nh gate inductance l g ? 1.84 ? nh gate resistance r g ? 1.0 ? 5. pulse test: pulse width 300 s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures.
NTMFS4833N http://onsemi.com 4 typical performance curves 4.2 v thru 10 v 2.8 v 3.2 v 3.0 v 200 0.003 0 100 1.0 0 1,000 100,000 02 1 v ds , drain ? to ? source voltage (volts) i d , drain current (amps) 0 v gs , gate ? to ? source voltage (volts) figure 1. on ? region characteristics figure 2. transfer characteristics i d , drain current (amps) 2 0.006 0 4 figure 3. on ? resistance vs. gate ? to ? source voltage v gs , gate ? to ? source voltage (volts) figure 4. on ? resistance vs. drain current and gate voltage i d , drain current (amps) r ds(on) , drain ? to ? source resistance ( ) r ds(on) , drain ? to ? source resistance ( ) figure 5. on ? resistance variation with temperature t j , junction temperature ( c) figure 6. drain ? to ? source leakage current vs. voltage v ds , drain ? to ? source voltage (volts) r ds(on) , drain ? to ? source resistance (normalized) i dss , leakage (na) ? 50 25 0 ? 25 50 75 23 15 10 30 0 3 v ds 10 v t j = 25 c t j = ? 55 c t j = 125 c v gs = 4.5 v 125 v gs = 0 v i d = 30 a v gs = 10 v t j = 150 c 50 0 45 t j = 25 c 20 v gs = 4.0 v 1.75 100 40 650 0.001 75 3.4 v 3.6 v 3.8 v 50 25 200 25 200 i d = 30 a t j = 25 c 8 v gs = 11.5 v 100 t j = 25 c 0.002 25 5 75 1 10 12 0.004 25 75 100 125 150 175 100 175 0.002 0.004 0.008 125 175 150 1.5 0.5 t j = 125 c 150 0.010 125 150 10,000 5 0.25 0.75 1.25
NTMFS4833N http://onsemi.com 5 typical performance curves t r t d(off) t d(on) t f v gs 10 0 10 15 gate ? to ? source or drain ? to ? source voltage (volts) c, capacitance (pf) figure 7. capacitance variation 6000 0 v gs v ds 55 t j = 25 c c iss c oss c rss c iss figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge 0 4 0 q g , total gate charge (nc) 2 8 40 i d = 30 a t j = 25 c q t 50 0 v sd , source ? to ? drain voltage (volts) i s , source current (amps) figure 9. resistive switching time variation vs. gate resistance r g , gate resistance ( ) 1 10 100 1000 t, time (ns) v gs = 0 v figure 10. diode forward voltage vs. current 100 0.2 0.4 5 10 15 10 v dd = 15 v i d = 15 a v gs = 11.5 v 0.6 0.8 20 30 25 t j = 25 c figure 11. maximum rated forward biased safe operating area 0.01 1 100 v ds , drain ? to ? source voltage (volts) 1000 i d , drain current (amps) r ds(on) limit thermal limit package limit 10 10 v gs = 20 v single pulse t c = 25 c 1 ms 100 s 10 ms dc 10 s 20 1 100 0 25 t j , starting junction temperature ( c) i d = 35 a figure 12. maximum avalanche energy vs. starting junction temperature 50 75 50 200 300 100 125 350 650 e as , single pulse drain ? to ? source avalanche energy (mj) 150 1000 100 25 8000 5000 4000 3000 2000 0 1.0 500 v gs , gate ? to ? source voltage (volts) 6 20 10 30 80 70 60 q1 550 600 12 90 7000 v ds = 0 v v gs = 0 v 10 q2 0.01 0.1 150 250 400 450 0.1 100 ms
NTMFS4833N http://onsemi.com 6 typical performance curves 125 c 100 c 25 c figure 13. avalanche characteristics 10,000 1 100 pulse width ( s) i d , drain current (amps) 10 10 1 1000 100 1,000 0.01 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 figure 14. fet thermal response r(t) ( c/w) t, time (s) 0.1 duty cycle = 0.5 0.2 0.05 0.02 0.01 single pulse
NTMFS4833N http://onsemi.com 7 package dimensions m 3.00 3.40 0 ??? 3.80 12 dfn5 5x6, 1.27p (so ? 8fl) case 488aa issue g notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeter. 3. dimension d1 and e1 do not include mold flash protrusions or gate burrs. 1234 top view side view bottom view d1 e1 d e 2 2 b a 0.20 c 0.20 c 2 x 2 x dim min nom millimeters a 0.90 1.00 a1 0.00 ??? b 0.33 0.41 c 0.23 0.28 d 5.15 bsc d1 4.50 4.90 d2 3.50 ??? e 6.15 bsc e1 5.50 5.80 e2 3.45 ??? e 1.27 bsc g 0.51 0.61 k 1.20 1.35 l 0.51 0.61 l1 0.05 0.17 a 0.10 c 0.10 c detail a 14 l1 e/2 8x d2 g e2 k b a 0.10 b c 0.05 c l detail a a1 e 3 x c 4 x c seating plane max 1.10 0.05 0.51 0.33 5.10 4.22 6.10 4.30 0.71 1.50 0.71 0.20 style 1: pin 1. source 2. source 3. source 4. gate 5. drain m *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 1.270 2x 0.750 1.000 0.905 0.475 4.530 1.530 4.560 0.495 3.200 1.330 0.965 2x 2x 3x 4x 4x pin 5 (exposed pad) on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NTMFS4833N/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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