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datasheet rev. 1.0, 2011-11-16 ILD4071 700ma high integration - dc/dc step-down converter led driver for high power leds
datasheet 2 rev. 1.0, 2011-11-16 ILD4071 table of contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.1 general parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.2 power supply monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 enable, dimming function and thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.2 electrical characteristics enable, bias, dimming func tion and thermal protection . . . . . . . . . . . . . 13 6.2.1 pwm dimming with c connected to ILD4071 pwmi pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.2.2 internal pwm dimming function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.3 overtemperature protection of the devi ce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 open load diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.2 electrical characteristics: open load diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.3 open load diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.1 output peak curren t adjustment via r set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.2 switching frequency determination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8.3 ILD4071 in led application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table of contents
pg-dso-8 ep type package marking ILD4071 pg-dso-8 ep ILD4071 datasheet 3 rev. 1.0, 2011-11-16 700ma high integrati on - dc/dc step-dow n converter ILD4071 1overview ? constant current generation ? wide input voltage range from 5v to 40v ? peak current regulation ? very low current consumption (<2ua) in sleep mode ? integrated power transistor with low saturation voltage ? integrated fast freewheeling diode ? integrated load curr ent sense resistor ? integrated status pull down transistor ? overtemperature protection ? switching frequency (typ. 200khz) ad justable via external rc network ? external pwm dimming input ? integrated pwm dimming engine ? analog dimming (output curr ent adjustable via external low power resistor and possibility to connect ptc resistor for led protection during overtemperature conditions) ? stable switching frequency due to fix off-time concept with v rec (supply voltage) feedforward ? under- and overvoltage shutdown with hysteresis ? small thermally enhanced exposed heatslug smd package ? green product (rohs) compliant description the ILD4071 is a highly integrated smart led buck controller with built in protection functions. the main function of this device is to drive single or multiple series connected leds efficiently from a voltage source higher than the led forward voltage by regulating a c onstant led current. the constant curr ent regulation is especially beneficial for led color accuracy and long led lifetime. the built in freewheeling diode and switching transistor with current sense requires less external component s and saves system costs. high flexibi lity is achieved by placing low power resistors to adjust output currents up to 700ma and the regulator switching frequency (typ. 200khz). an integrated pwm dimming engine provides a led dimm ing function by placing a simple rc network to gnd. this feature is dedicated for simple decentralized light mo dules without micro controller involvement.
datasheet 4 rev. 1.0, 2011-11-16 ILD4071 overview applications ? led controller for industrial applications ? universal constant current and voltage source ? general illumination e.g. halogen replacement ? residential architectural and industrial commercial lighting for in- and outdoor ? signal and marker lights for orientation or navigation (e.g. steps, exit ways, etc.) for automotive and transportation applications, please refer to the infineon? auto led products.
ILD4071 block diagram datasheet 5 rev. 1.0, 2011-11-16 2 block diagram the ILD4071 regulates the led current by monitoring the load current (peak current measurement) through the internal switch cycle by cycle. when the curr ent through the switch reaches the threshold i peak the switch is shut- off and it is kept off for a time equal to t off . both i peak and t off can be fixed through few external components. the peak current i peak is fixed by a resistor connected to the set pin while the t off is fixed by rc network. as t off is fixed and the duty cycle depends on v rec , the frequency depends on v rec as well. refer to chapter 8.2 for the evaluation of the switching frequency. figure 1 block diagram ILD4071 1 5 3 2 8 7 6 gnd vrec logic power switch freq sw internal supply en thermal protection uv+ov lockout set pwmi st power- switch driver open load detection peak current measurement on/off logic peak current adjustment 4 off-time control internal pwm generation
datasheet 6 rev. 1.0, 2011-11-16 ILD4071 pin configuration 3 pin configuration 3.1 pin assignment figure 2 pin configuration ILD4071 3.2 pin definitions and functions pin symbol function 1vrec voltage recirculation output and internal supply input; this pin is the supply pin of the ic (see block diagram). furthermore the cathode of the integrated fast freewheeling diode is connected to this pin as well. 2st status output; open collector diagnostic output to indicate an open load failure. refer to chapter 7 for more details. 3en enable; apply logic high signal to enable the device 4 set set input; connect a low power resistor to adjust the output current. 5 pwmi pwm input; pwm signal for dimming leds. connect external r and c combination to achieve an auto pwm-dimming function with defined frequency and duty cycle. 1) internal pwm dimming function (external rc connected to gnd) 2) external pwm dimming functi on (c is controlling this pin) refer to chapter 6 for more details. 6freq frequency select input; connect external resistor and capacitor to gnd to set the off-ti me of the switching frequency. 7gnd ground; connect to system ground. st gnd en freq sw 5 6 4 3 2 7 1 8 set vrec pwmi ep
ILD4071 pin configuration datasheet 7 rev. 1.0, 2011-11-16 8sw integrated power-switch output; collector of the integrated npn-power transistor. ep exposed pad; connect to external heatspreading copper area with electrically gnd (e .g. inner gnd layer of the pcb via thermal vias) pin symbol function
datasheet 8 rev. 1.0, 2011-11-16 ILD4071 general product characteristics 4 general product characteristics 4.1 absolute maximum ratings note: stresses above the ones listed here may cause perm anent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation. absolute maximum ratings 1) t j = -40 c to +125 c; all voltages with respect to ground (unless otherwise specified) 1) not subject to production test, specified by design. pos. parameter symbol limit values unit conditions min. max. voltages 4.1.1 vrec (pin 1) recirculation and supply input v rec -0.3 45 v ? 4.1.2 st (pin 2) diagnostic status output voltage v st -0.3 45 v ? 4.1.3 st (pin 2) diagnostic status current i st ?150ma? 4.1.4 en (pin 3) enable input voltage v en -0.3 45 v ? 4.1.5 set (pin 4) peak current adjust input voltage v set -0.3 6 v ? 4.1.6 pwmi (pin 5) pwm input voltage v pwmi -0.3 6 v ? 4.1.7 freq (pin 6) off-time adjustment input v freq -0.3 6 v ? 4.1.8 sw (pin 8) switch output v sw -0.3 45 v ? temperatures 4.1.9 junction temperature t j -40 150 c? 4.1.10 storage temperature t stg -55 150 c? esd susceptibility 4.1.11 esd resistivity all pins to gnd v esd,hbm -2 2 kv hbm 2) 2) esd susceptibility hbm according to eia/jesd 22-a 114b
ILD4071 general product characteristics datasheet 9 rev. 1.0, 2011-11-16 4.2 functional range note: within the functional range the ic operates as de scribed in the circuit description. the electrical characteristics are specifi ed within the conditions given in the re lated electrical ch aracteristics table. 4.3 thermal resistance note: this thermal data was generated in accordance with jedec jesd51 standards. for more information, go to www.jedec.org . pos. parameter symbol limit values unit conditions min. max. 4.2.1 supply voltage range v rec 540 1) 1) not subject to production test, specified by design. ? 4.2.2 output current range i out 100 700 ma ? 4.2.3 switching frequency f sw 50 300 1) khz t j = 25c to 150c 4.2.4 junction temperature t j -40 125 c? pos. parameter symbol limit values unit conditions min. typ. max. 4.3.1 junction to case r thj-case ?10?k/w 1) 2) 1) not subject to production test, specified by design. 2) specified r thj-case value is simulated at natural convection on a cold plate setup (all pins and the exposed pad are fixed to ambient temperature). ta=25c, power switch and freewheeling diode are dissipating 1w. 4.3.2 junction to ambient (2s2p) r thja ?40?k/w 1) 3) 3) specified rthja value is according to jedec jesd51-2, -7 at natural convection on fr4 2s2p board; the product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm boar d with 2 inner copper layers (2 x 70m cu, 2 x 35m cu). according to jesd51-5 a thermal via array under the exposed pa d contacted the first inner copper layer. ta=25c, power switch and freewheeling diode are dissipating 1w.
datasheet 10 rev. 1.0, 2011-11-16 ILD4071 electrical characteristics 5 electrical characteristics all parameters have been tested at 25c, unless otherwise specified. 5.1 general parameters electrical characteristics: buck regulator v rec = 24 v, t j = -40 c to +125 c, all voltages with respect to ground (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 5.1.1 voltage drop over power transistor v drop,100 ?0.8? v i peak =100ma 5.1.2 voltage drop over power transistor v drop,700 ?1.4? v i peak =700ma 5.1.3 freewheeling diode forward voltage v fw,100 ?0.8? v i peak =100ma 5.1.4 freewheeling diode forward voltage v fw,700 ?1.4? v i peak =700ma 5.1.5 peak over current limit i peak_lim ?1.4? a? 5.1.6 peak current accuracy i peak_acc 450 500 550 ma v rec = 12v v en = 5v v led = 7.2v r set = 14k l sw = 220h f sw = 200khz 5.1.7 input under voltage shutdown threshold v rec,uvoff ?? 5 v v en = 5v v rec decreasing; see figure 3 5.1.8 input voltage startup threshold v rec,uvon ?? 6 v v en = 5v v rec increasing; see figure 3 5.1.9 input over voltage shutdown threshold v rec,ovoff 40.5 ? ? v v en = 5v v rec increasing; see figure 3 5.1.10 input over volt age startup threshold v rec,ov 40 ? ? v v en = 5v v rec decreasing; see figure 3 5.1.11 switch on delay t don ? 400 600 ns 1) ? 1) the minimum switching on time t on must be greater than t don + t doff 5.1.12 switch off delay t doff ?500850ns 1) ? 5.1.13 reference voltage at set pin v set 1.16 1.225 1.29 v ? 5.1.14 pull up current for freq pin i freq 5? ? ma v freq =0v 5.1.15 oscillator switch off threshold v freq,high ?3.2? v? 5.1.16 oscillator switch on threshold v freq,low ?1.2? v?
ILD4071 datasheet 11 rev. 1.0, 2011-11-16 5.2 power supply monitoring over- and undervoltage shutdown if the supply voltage v rec drops below the input under voltage threshold voltage v rec,uvoff , the power stage is switched off and the device is in normal consumption mode (i q,on ). if v rec rises again and reaches the input under voltage startup threshold v rec,uvon the power stage is restarted and the device is back to normal operation mode. same behavior applies to overvoltage. the internal status transistor is switching off during an overvoltage or undervoltage event on v rec . a detailed description of the under- and overvoltage behavior is displayed in figure 3 below. figure 3 over- and undervoltage protection v sw v rec,uvoff v rec,uvon v rec,uvhyst t t i led t v rec v rec,ovhyst v rec,ovon v rec,ovoff i set st t st pull- down on st pull-down transistor off st pull-down transistor off st pull- down on st pull- down on
datasheet 12 rev. 1.0, 2011-11-16 ILD4071 enable, dimming function and thermal protection 6 enable, dimming function and thermal protection 6.1 description enable function: a logic high signal on the en pin turns the device on. a lo gic low signal on enable pin en brings the device in sleep mode. the current consumption is typ. 0.1a in this ca se. the en pin has an internal pull down resistor which ensures that the ic is in sleep mode and the power stage is switched off in case the pin en is externally not connected. dimming function: the pwmi pin combines two functions: 1) pwm dimmming via a c (3.3vand 5v c) 2) integrated pwm dimming engine for standalone soluti ons in decentralized light module (frequency and duty cycle adjustable via external r,c network) a detailed description of the pwmi pin is displayed in figure 4 below. figure 4 pwmi pin description pwmi on ? dc=100% v pwmi pwmi off ? dc=0% t sw- on sw - off sw- on sw - off sw- on sw - off sw- on sw - off internal pwm v pwmi,off v pwmi,on
ILD4071 enable, dimming function and thermal protection datasheet 13 rev. 1.0, 2011-11-16 6.2 electrical characteristics enable , bias, dimming fun ction and thermal protection all parameters have been tested at 25c, unless otherwise specified. electrical characteristics: enable, bias , dimming function and thermal protection v rec = 24 v, t j = -40 c to +125 c, all voltages with respect to ground (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 6.2.1 current consumption, sleep mode i q,off ?0.12a v en = 0v; 6.2.2 current consumption, active mode (open load) i q,on ??5ma v en = 5.0v; i peak = 0ma (open load); 6.2.3 current consumption, active mode i q,on ??10ma v en = 5.0v; i peak = 700ma 6.2.4 en turn on threshold v en,on 2.8 ? ? v ? 6.2.5 en turn off threshold v en,off ??0.8v? 6.2.6 en high input current i en,hi ?100?a v en = 5v 6.2.7 en low input current i en,lo 0?20a v en = 0.5v 6.2.8 pwmi turn on threshold v pwmi,on ?1?vsee figure 4 6.2.9 pwmi turn off threshold v pwmi,off ?2?vsee figure 4 6.2.10 pwmi source current i pwmi ?250?a r set = 10k v pwmi = 0.5v; 6.2.11 over temperature shutdown t j,sd 150 175 ? c 1) 1) specified by design. not subject to production test. 6.2.12 over temperature shutdown hysteresis t j,sd_hyst ?15?k 1)
datasheet 14 rev. 1.0, 2011-11-16 ILD4071 enable, dimming function and thermal protection 6.2.1 pwm dimming with c conn ected to ILD4071 pwmi pin the pwmi pin can be used for pwm dimming. it is a commonly practiced dimming method to prevent color shift in led light applications. figure 5 timing diagram for led dimming with c v pwmi v pwmi,off i peak v pwmi,on t t t pwmi t off sw - on sw - off sw - off sw - on sw - off
ILD4071 enable, dimming function and thermal protection datasheet 15 rev. 1.0, 2011-11-16 6.2.2 internal pwm dimming function the ILD4071 has an integrated pwm dimming engine. via an external r pwm and c pwm network it is possible to achieve a pwm led current waveform. the duty cycle and dimming frequency is depending on the size of the external components (see formula in figure 7 ). this feature is specially designed to achieve a stand alone pwm dimming function without the usage of micr o controllers or external logic. this allows a flexible and cost effective usage of the device in a decent ralized light module application. the advantage of a pwm dimming (to redu ce the led load current) is the change of light intensity only, at constant light color. with an external rc network a pwm programming betw een 100hz and 1200hz and duty cycles between 4% and max. 20%. is possible. figure 6 displays the external components corresponding to the desired pwm frequency and duty cycle. the following setup applies for the table displayed in figure 6 : v rec =12v, v led =7.2v, l sw =220h, r set =14k . figure 6 r pwmi and c pwmi versus f pwmi and dc r pwmi c pwmi f pwmi dc 216k 64nf 100hz 4% 216k 32nf 200hz 4% 216k 21nf 300hz 4% 216k 16nf 400hz 4% 87k 150nf 100hz 10% 87k 75nf 200hz 10% 87k 50nf 300hz 10% 87k 37nf 400hz 10% 44k 265nf 100hz 20% 44k 132nf 200hz 20% 44k 88nf 300hz 20% 44k 7 gnd 5 pwmi r pwmi c pwmi
datasheet 16 rev. 1.0, 2011-11-16 ILD4071 enable, dimming function and thermal protection 6.3 overtemperature prot ection of the device a temperature sensor at the power stage causes the ov erheated device to switch off to prevent destruction. during over temperature condition the internal st transist or is switched off. due to the autorestart function of the device the status signal will toggle ac cordingly. the timing of this pattern is dependant on th e thermal capability of the application and can be used to distinguish between open load error and overtemperature condition. more details on the overtemperature behavior is displayed in figure 7 below. figure 7 overtemperature behavior v sw t i led t ? v en t h l t j t ta t jsd t jso i peak st t st pull-down transistor on st pull- down off st off st on st off st on st off st on st off
ILD4071 open load diagnosis datasheet 17 rev. 1.0, 2011-11-16 7 open load diagnosis 7.1 description the ILD4071 has an integrated open load during on diagnosis . during normal operation the st pin (open collector output) is pulled to gnd (internal transi stor is on). the open load detection is realized by monitoring the switching behavior at the sw pin. during an open load event the inte grated power stage at the sw pin will be statically turned on. if the output stage is turned on for more than the open load diagnosis delay time (t ol ) an open load condition is detected. an open load event will swit ch off the internal transistor. if a c is connected to the st pin an external pull up resistor should be pl aced to achieve a logic high level fo r the proper open lo ad error signalling reporting. for a timing diagram on the functionalit y of the open load diagnosis please refer to figure 8 . 7.2 electrical characteristics: open load diagnosis all parameters have been tested at 25c, unless otherwise specified. electrical characteristics: open load diagnosis v rec = 24 v, t j = -40 c to +125 c, all voltages with respect to ground (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 7.2.1 open load diagnosis delaytime t ol 20 ? ? s ? 7.2.2 voltage drop over internal st transistor v drop,st ?0.3?vi st =150ma
datasheet 18 rev. 1.0, 2011-11-16 ILD4071 open load diagnosis 7.3 open load diagnosis the st pin can be connected directly to a c input. duri ng an open load condition t he st transistor is off. an external pull up resistor connected to v dd is required to signal a logic high signal on the st pin during an open load error. please consider that this diagnosis functionalit y is only active if the device is in active mode (high potential at the en pin). refer to application drawing figure 13 . figure 8 open load diagnosis via c connected to st pin open load event v sw st t ol open load t t t t t pwmi v en t high low sw - on sw - off sw - off sw - on sw - off v pwmi,off v pwmi,on st pull -down transistor on st pull-down transistor off v pwmi high - z
ILD4071 application information datasheet 19 rev. 1.0, 2011-11-16 8 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. 8.1 output peak current adjustment via r set the external resistor r set is used to adjust the peak current of t he regulator. maximum achievable peak current is 700ma and minimum achievable peak current is 100ma. the set pin provides an internally fixed voltage level at typ.: 1.225v. out of this considerations the equation is: i peak = ( 1.225v / r set ) * 5710 the factor 5710 is derived from following considerations: ? ipeak, max = 700ma (r set = 10k ) ? ipeak,min = 100ma (r set = 70k ) internal comperator voltage at set pin = 1.225v. the circuitry behind the set pin is adjusting higher peak currents with lower r set values. the r set value should be in the range from 10k to 70k to achieve the requested peak current range. the following setup applies for the table displayed in figure 9 : v rec =12v, v led =7.2v, l sw =220h. figure 9 r set resistor selection i peak [ma] r set [k ? ] 100 200 300 400 500 600 700 70 35 23 18 14 12 10
datasheet 20 rev. 1.0, 2011-11-16 ILD4071 application information 8.2 switching frequency determination the switching concept of the ILD4071 is based on peak current regulation with constant off time (t off ). thus the switching frequency f sw is dependent on input voltage (v rec ) variations. with the external r freq , c freq , r comp r clamp and z clamp network, it is possible to adjust and stabilize the switching frequency of the regulator and achieve a. 1) no compensation, f sw increases accordingly to the v rec increase 2) switching frequency st abilized in a defined v rec range via compensation resistor r comp 3) switching frequency st abilized over the whole v rec range via r comp and additional clamping circuit z clamp and r clamp (=1k ) figure 10 setting t off time of regulator with external r freq , c freq network, stabilize f sw via r comp , r clamp and z clamp setup 2 applies for the table displayed in figure 11 : v rec =12v, v led =7.2v, l sw =220h, r set =14k . figure 11 r freq , c freq versus f sw table 7 gnd 6 freq r freq c freq 1 vrec 7 gnd 6 freq r freq c freq 1 vrec r comp 7 gnd 6 freq r freq c freq 1 vrec r comp z clamp r clamp 1 2 3 0 100000 200000 300000 400000 500000 600000 700000 5 10152025 f sw [hz] v rec [v] f sw \ without ? compensation 0 100000 200000 300000 400000 500000 600000 700000 5 10152025 f sw [hz] v rec [v] f sw \ compensation ? via ? r comp 0 100000 200000 300000 400000 500000 600000 700000 5 10152025 f sw [hz] v rec [v] f sw \ compensation ? via ? r comp ? + ? v rec ? clamp r comp r freq c freq f sw t off 255.8k 17.1k 220pf 50khz 6.47 s 115.8k 7.7k 220pf 100khz 3.19 s 69.7k 4.6k 220pf 150khz 2.12 s 46.8k 3.1k 220pf 200khz 1.59 s 72.8k 4.9k 100pf 250khz 1.27 s 52.7k 3.5k 100pf 300khz 1.06 s
ILD4071 application information datasheet 21 rev. 1.0, 2011-11-16 figure 12 theoretical operating waveforms v en t down t t t t high low v freq i led v sw v freq,high v freq,low i set =i peak v rec +v fw v drop transistor diode t diode t diode t diode t diode t up t on t off i min i ripple
datasheet 22 rev. 1.0, 2011-11-16 ILD4071 application information 8.3 ILD4071 in led application figure 13 provides a simplified application wit h two high brightness leds in seri es. a c is controlling the en pin to put the device into sleep/active mode. also the pwmi pin can be directly contro lled via a c port if pwm dimming of the led current is required. the open load st pin monitors the load condition of the application and gives feedback to the c. an external pull up resistor is recommended to achieve a logic high signal during an open load error (internal status transistor is switched off and the st pin is high ohmic). the external low power resistor r set is used to set the required peak current for the led load (refer to figure 9 for more details). to set the desired switching frequency of the buck regulator the external r freq and c freq network must be connected to gnd (reference values are given in figure 11 ). figure 13 simplified application diagram ILD4071 note: this is a very simplified example of an application circuit. the function must be verified in the real application sw gnd freq pwmi st en vrec 5 6 7 8 1 4 3 2 l sw c freq r freq r set c rec vs = 5v to 40v pwm dimming via c open load status connected to c i led set connect to c pin v dd r comp v rec r st r clamp sw driver open load d clamp c out
ILD4071 package outlines datasheet 23 rev. 1.0, 2011-11-16 9 package outlines figure 14 outline pg-dso-8 ep green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). pg-dso-8-27-po v01 14 85 8 14 5 8x 0.41 ?.09 2) m 0.2 d c a-b 1.27 c stand off +0 -0.1 0.1 (1.45) 1.7 max. 0.08 seating plane c a b 4.9 ?.1 1) a-b c 0.1 2x 3 ) jedec reference ms-012 variation ba 1) does not include plastic or metal protrusion of 0.15 max. per side 2) dambar protrusion shall be maximum 0.1 mm total in excess of lead width bottom view ?.2 3 ?.2 2.65 0.2 ?.2 d 6 m d 8x 0.64 ?.25 3.9 ?.1 1) 0.1 0.35 x 45? cd2x +0.06 0.19 8 ? max. index marking for further package information, please visit our website: http://www.infineon.com/packages . dimensions in mm
datasheet 24 rev. 1.0, 2011-11-16 ILD4071 revision history 10 revision history version date changes rev. 1.0 2011-11-16 init ial data sheet for ILD4071
edition 2011-11-16 published by infineon technologies ag 81726 munich, germany ? 2012 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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