v ds = 20v, i d =6a r ds(on), vgs@2.5v , ids@5.2a = 40m r ds(on), vgs@4.5v, ids@6a = 28m features advanced trench process technology high density cell design for ultra low on-resistance high power and current handing capability fully characterized avalanche voltage and current ideal for li ion battery pack applications maximum ratings and thermal characteristic s (t a = 25 o c unless otherwise noted) symbol limi t uni t v ds 20 v gs + 12 i d 6 i dm 30 t a = 25 o c 2.0 t a = 75 o c 1.3 t j , t stg -55 to 150 o c junction-to-ambient thermal resistance (pcb mounted) r ja 62.5 o c/w note: 1. maximum dc current limited by the package 2. 1-in 2oz cu pcb board august '05 rev 2 1 n-channel mosfet w drain-source voltage p d pulsed drain current operating junction and storage temperature range continuous drain current gate-source voltage maximum power dissipation parameter v a top view internal schematic diagram tsop-6 gate1 drain1 source1 1) 2) 2 gate2 drain2 source2 FMP06N20D dual die 20v n-channel enhancement-mode mosfet
electrical characteristic s parameter symbol test conditio n min typ ma x uni t static drain-source breakdown voltage bv dss v gs = 0v, i d = 250ua 20 - - v drain-source on-state resistance r ds(on) v gs = 2.5v, i d = 5.2a 34 40 drain-source on-state resistance r ds(on) v gs = 4.5v, i d = 6a 24 28 gate threshold voltage v gs(th) v ds =v gs , i d = 250ua 0.6 v zero gate voltage drain current i dss v ds = 20v, v gs = 0v 1 ua gate body leakage i gss v gs = + 12v, v ds = 0v + 100 na gate resistance rg forward transconductance g fs v ds = 10v, i d = 6a 7 13 s dynamic total gate charge q g 4.86 gate-source charge q gs 0.92 gate-drain charge q gd 1.4 turn-on delay time t d(on) 8.1 turn-on rise time t r 9.95 turn-off delay time t d(off) 21.85 turn-off fall time t f 5.35 input capacitance c iss 562 output capacitance c oss 106 reverse transfer capacitance c rss 75 source-drain diod e max. diode forward current i s 1.7 a diode forward voltage v sd i s = 1.7a, v gs = 0v 1.2 v note : pulse test: pulse width <= 300us, duty cycle<= 2% august '05 rev 2 2 v ds = 8v, v gs = 0v f = 1.0 mhz pf m nc v dd = 10v, d = 1, v gen = 4.5v r g = 6 ns v ds = 10v, i d = 6a v gs = 4.5v FMP06N20D dual die 20v n-channel enhancement-mode mosfet
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