ds-cpc5710-r1.0 12/16/2002 www.clare.com 1 features ? excellent common-mode rejection ratio (cmrr), >40 db ? supplied application circui ts can meet isolation requirements of worldwide telephony standards ? small 8-pin soic ? worldwide telephone network compatibility ? full-wave ringing level detector comparator with internal threshold, large hysteresis, and logic-level output ? 3.3 or 5.0 volt operation ? high differential input impedance, very low common- mode input impedance ? fixed gain ? differential or single-ended linear output ? ttl logic input ? cmos logic output (ttl compatible) ? virtually non-detectable in voice monitoring applications applications ? in signal monitoring applications, cpc5710n can be used for: ? display feature (caller id) signal processing ? line-in-use detection (another-phone-off-hook) ? ringing signal level detection ? battery presence monitoring ? tip and ring lead voltage monitoring ? line condition detection, in cluding line polarity, tip and ring lead voltage, and battery presence description the clare cpc5710n is a cmos special purpose fixed-gain amplifier with comparator for telephone line monitoring. the high (>40 db) common-mode rejection ratio makes the cpc5710n an excellent choice for signal monitoring, discrete voice recording, and line condition monitori ng applications. the cpc5710n is ideal for modem applications including embedded modem designs like set-top boxes, and voice recording applications. ordering information figure 1. cpc5710n block diagram part number description cpc5710n phone line monitor ic, tubed CPC5710NTR phone line monitor ic, tape and reel in+ in- lin/cmp v dd v dd v dd v ss v ss v ss cmpout linout+ linout- + + - - - + 1.625 v 1.25 v 2v 0v a=6 v 3 6 7 1 2 5 4 8 cpc5710n phone line monitor (plm) ic
cpc5710n 2 www.clare.com rev. 1.0 12/16/2002 1 specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 environmental characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.4 pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 another-phone-off-hook (apoh) and line pola rity detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 non-intrusive line monitoring, display feature (caller id) signal reception, and ri ng detection application . . . . . . . . . . . . . . . . 6 2.2.1 frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 regulatory issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 using cpc5710n. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 lin/cmp input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 amplifier design considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2.1 linear amplifier gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.3 comparator considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.3.1 ringing signal detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.3.2 setting ring detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 power quality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 manufacturing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.1 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2 soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2.1 moisture reflow sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2.2 reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
cpc5710n rev. 1.0 12/16/2002 www.clare.com 3 1. specifications 1.1 absolute maximum ratings 1.2 electrical characteristics v dd = 5v, temperature = 25 c unless otherwise indicated. parameter minimum maximum unit v dd -0.3 6 v storage temperature -40 +125 c total package power dissipation 300 mw logic input voltage -0.3 v dd + 0.3 v absolute maximum ratings are stress ratings. stresses in excess of these ratings can cause permanent damage to the device. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this data sheet is not implied. exposure of the device to the absolute maximum ratings for an extended period may degrade the device and affect its reliability. parameter conditions minimum typical maximum unit dc characteristics supply voltage, v dd 3.0 - 5.5 v supply current, i dd --10ma ac characteristics input impedance 10 - - m ? input offset voltage, v io --40mv input offset current, i io no common-mode signal applied - - 35 na input offset current. i io with 12 a of common-mode signal applied - - 125 na output dc bias level at linout+ or linout-, i o @ 0.5 ma 0.9 1.0 1.1 v output low voltage swing i o = 0.5 ma --50mv gain, a v 0 to 20 khz 5.88 6 6.12 - common-mode rejection ratio, cmrr using supplied application circuits, with common-mode current 12 a, 0 to 120 hz 40 - - db equivalent input noise voltage, v n --90-dbm/hz
cpc5710n 4 www.clare.com rev. 1.0 12/16/2002 1.3 environmental characteristics 1.4 pinout figure 2. package pinout comparator threshold characteristics comparator detection threshold voltage i cm = 0 675 750 850 mv comparator detection threshold voltage i cm = 12 a 488 750 1012 mv comparator hysteresis voltage i cm = 0 300 375 450 mv lin/cmp input characteristics input low voltage v il --0.8v input high voltage v ih 2.0 - - v input high leakage current (i ih ) v ih = 2.4 v - - -120 a input low leakage current (i il ) v il = 0.4 v - - -120 a unless otherwise specified, minimum and maximum values are producti on testing requirements. typical values are characteristic o f the device and are the result of engineering evaluations. typical values are provided for information purposes only and are not part of the testing requirements . parameter conditions minimum typical maximum unit parameter conditions minimum typical maximum unit operating temperature -40 - +85 c operating humidity non-condensing 5 - 95 % pin name description 1 vdd power supply 2cmpout comparator output, active low 3lin /cmp output select, low for linear output or high for comparator output 4 linout- negative differential linear output 5 linout+ positive differential linear output 6 in+ positive differential input 7 in- negative differential input 8 vss ground 1 2 3 4 8 7 6 5 vdd cmpout lin/cmp linout- vss in- in+ linout+
cpc5710n rev. 1.0 12/16/2002 www.clare.com 5 2. applications 2.1 another-phone-off-hook (apoh) and line polarity detector this circuit performs two additional phone line interface functions, apoh and line polarity detection. the apoh output is logic low if another phone connected in parallel to the detector is off-hook, specifically, if the tip lead to ring lead voltage is less than approximately 18 v. the polarity output indicates the polarity of the phone line. if tip is positive with respect to ring, polarity out will be high. figure 3. apoh and polarity detection application circuit in+ in- lin/cmp v dd v dd v dd v ss v ss v ss cmpout linout+ +v +v +v in- in+ in- in+ in- in+ out out out linout- a a a a a + + - - - + 1.625 v 1.25 v a=6 v u1 cpc5710 1/4 u2 lm339 1/4 u2 lm339 1/4 u2 lm339 apoh out polarity out r1-4 8.06 m 1% eia 1206 ? r5 604 k ? r17 4.7 m ? r10 21 k ? r15 10 k ? r14 4.7 m ? r16 10 k ? r6 4.7 m r7 21 k ? r8 20 k ? r12 20 k ? r13 20 k ? r9 499 k ? r11 499 k ? c1 1 nf tip ring unless noted otherwise: all resistors 1%, 1/16 w. all capacitors 16 v 10%. 2v 0v
cpc5710n 6 www.clare.com rev. 1.0 12/16/2002 2.2 non-intrusive line monitoring, display feature (caller id) signal reception, and ring detection application this application uses the logic input lin /cmp to select between detecting ringing or passing through display feature (caller-id) and voice signals. note the ac coupling of the tip and ring signals. with this circuit, set lin /cmp high to detect ringing. after a valid ring, set lin /cmp low to couple the audio channel signal to the output pins. please see comparator considerations on page 7 for more information on ringing detection. figure 4. non-intrusive line monitoring, display fe ature (caller id) signal reception, and ring detection application circuit 2.2.1 frequency response the blocking capacitors used in this application circuit affect the frequency response of the system. with the components shown, response rolls off 3 db @ 166 hz. other values can be used for different response characteristics. 2.3 regulatory issues component sizing and value recommendations shown in the application circuits above will need to be reviewed with regard to the regulatory requirements of any particular application. in+ in- lin/cmp v dd v dd v dd v ss v ss v ss cmpout ring detect (to ring parser) linout+ display feature output v = v at 500 hz out in 3.3 or 5 v linout- a + + - - - + 1.625 v 1.25 v a=6 v u1 cpc5710 r1-4 1.8 m (r ) snp c1,2 220 pf (c ) snp r5 (r ) 1.5 m, 1% 0603 snpd tip ring from control logic 2v 0v unless noted otherwise: 1/8 w, all resistors are 1%, 1206. all capacitors are 2 kv, 10%.
cpc5710n rev. 1.0 12/16/2002 www.clare.com 7 3. using cpc5710n 3.1 lin /cmp input the lin /cmp input selects the active output, either the comparator output cmpout or the linear outputs, linout- and linout+. set lin /cmp low for linear output and high for comparator output. note that both outputs cannot be used at once. with lin /cmp at logic low (lin /cmp = 0), the amplifier outputs are biased at 1 vdc and cmpout is held high. with lin /cmp at logic high (lin /cmp = 1), linout+ is 0 v and linout- is 2 v. figure 5. lin /cmp timing for caller-id signal reception 3.2 amplifier design considerations amplifier inputs are biased at 1.25 vdc, the internal voltage references. the internal common-mode circuitry maintains the average of the inputs at 1.25 vdc. for example, if one input reaches 1.3 v, the common-mode circuit drives the other input to 1.2 v. 3.2.1 linear amplifier gain display feature information (caller id) and voice signals are coupled through the linear amplifier. in north america, cid data signals are typically sent between the first and second ringing signal burst. referring to figure 4, signal gain from tip and ring to linout+ and linout- is determined by: where ? is the frequency of the signal. clare application note an-117 customize caller id gain and ring detect voltage threshold is a spreadsheet for trying different component values in this type of circuit. 3.3 comparator considerations 3.3.1 ringing signal detection the cpc5710n comparator is a full-wave configuration. ringing signals will assert the output on positive and negative parts of the ringing waveform. hysteresis is employed in the internal comparator circuit to provide noise immunity. the set-up of the comparator causes cmpout output pulses to remain low for most of the ringing signal positive and negative half-cycles. cmpout returns high when the ringing signal is near the zero-voltage crossing. figure 6. cmpout rela tive to ring signal 3.3.2 setting ring detection threshold the ring detection threshold depends on the component values of the input network. the values for these components shown in the typical application circuits are recommended for typical operation. referring to figure 4, the ring detection threshold can be changed according to the following formula: caller id data lin/cmp signal levels not to scale 2s 500 ms 3s 475 ms 2s gain cid db () 20 6 r snpd 4 r snp r snpd + () 2 1 fc snp () 2 ------------------------- - + ---------------------------------------------------------------------------------------- - log = cmpout ring signal v ringpk 750 mv r rsnpd ------------------- ?? ?? 4 r snp r snpd + () 2 1 f ring c snp () 2 -------------------------------------- + =
cpc5710n 8 www.clare.com rev. 1.0 12/16/2002 with the application circuit in figure 4, the series capacitors serve to reduce the magnitude of high- amplitude, low-frequency ring signals, making the ring detection threshold of the cpc5710n variable with the frequency the ringing signal. with the circuit as given, cmpout will change states with a 15 hz ringing signal at approximately 48 v peak . for a 68 hz ring signal, cmpout will change states with a ringing signal amplitude of approximately 11.5 v peak . in applications where cpc 5710n will be used only as a ring level detector, or if significant attenuation of the amplified signal can be tolerated, the frequency variability of the ring detection threshold can be reduced by increasing the value of the resistors and capacitors in series with the input. clare application note an-117 customize caller id gain and ring detect voltage threshold is a spreadsheet for trying different component values in this circuit for litelink snoop circuit applications. 4. power quality cpc5710n works best with a clean power supply. to clean up power supply noise, clare, inc., recommends using a pi network on the v dd pin as shown in figure 7, if needed. figure 7. optional power supply pi network note: for lower-frequency noise, use a 220 h inductor in series with r100. 5. manufacturing information the cpc5710n branding (package imprinting) leaves off the last character of the part number due to package space limitations. 5.1 package dimensions cpc5710n uses jedec standard 8-pin soic packaging. see jedec publication 95, ms-012 for 3.75 (0.150) small-outline package dimensions. 5.2 soldering 5.2.1 moisture reflow sensitivity clare has characterized the moisture reflow sensitivity of this product using ipc/jedec standard j-std- 020a and classifies it as msl (moisture sensitivity level) 1, not moisture sensitive. 3.3 or 5 v r100 10 to v pin 1 dd a a c101 10 fb100 600 200 ma ? c100 1
5.2.2 reflow profile the maximum ramp rates, dwell times, and temperatures of the assembly reflow profile should not exceed those specified in ipc/jedec standard j- std-020a, which were used to determine the moisture sensitivity level of this component. for additional information please visit www.clare.com clare, inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this publica tion and reserves the right to make changes to specifications and product descriptions at any time without notice. neither circuit patent lice nses or indemnity are expressed or implied. except as set forth in clares standard terms and conditions of sale, clare, inc. assumes no liability whatsoever, and disclaims any express or implied warranty relating to its products, including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringe ment of any intellectual property right. the products described in this document are not designed, inten ded, authorized, or warranted for use as components in systems i ntended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of clares product may result in d irect physical harm, injury, or death to a person or severe property or environmental damage. clare, inc. rese rves the right to discontinue or make changes to its product s at any time without notice. specification: ds-cpc5710n-r1.0 ? copyright 2002, clare, inc. all rights reserved. printed in usa. 12/16/2002
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