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41112 sy 20120131-s00006 no.a2019-1/20 http://onsemi.com semiconductor components industries, llc, 2013 june, 2013 lv8747ta overview the lv8747ta is a pwm constant-current control steppi ng motor driver and switching regulator controller ic. features ? two circuits of pwm constant-current control stepping motor driver incorporated ? control of the stepping motor to w1-2 phase excitation possible ? output-stage push-pull composition enabling high-speed operation ? two circuits of switching regulator controller incorporated ? thermal shutdown circuit incorporated ? timer latch type short-circuit protection circuit incorporated ? motor driver contro l power incorporated ? output short-circuit protection circuit incorporated ? chopping frequency selectable ? high-precision reference vo ltage circuit incorporated ? upper and lower regenerative diodes incorporated specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage vm max 38 v driver output peak current 1 mdi o peak1 out1/out2 tw 10ms, duty 20% 1.75 a driver output continuous current 1 mdi o max1 out1/out2 1.5 a driver output peak current 2 mdi o peak2 out3/out4 tw 10ms, duty 20% 0.8 a driver output continuous current 2 mdi o max2 out3/out4 0.5 a regulator output current swi o max out5/out6 tw 1 s 500 ma allowable power dissipation 1 pd max1 independent ic 0.4 w allowable power dissipation 2 pd max2 our recommended four-layer substrate *1, *2 4.85 w operating temperature topr -20 to +85 c storage temperature tstg -55 to +150 c *1 specified circuit board : 100 100 1.6mm 3 : 4-layer glass epoxy printed circuit board *2 for mounting to the backside by soldering, see the precautions. caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of abso lute maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of th e ic may be degraded. please contact us for the further detai ls. bi-cmos lsi pwm constant-current control stepping motor driver and switching regulator controller orderin g numbe r : ENA2019 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
lv8747ta no.a2019-2/20 allowable operating ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage vm 10 to 35 v logic input voltage v in 0 to 5 v vref input voltage vref 0 to 3 v regulator output voltage v o vm-5 to vm v regulator output current i o 0 to 200 ma error amplifier input voltage v o a 0 to 3 v timing capacity ct 100 to 15000 pf timing resistance rt 5 to 50 k triangular wave oscillation frequency f osc 10 to 800 khz electrical characteristics at ta = 25c, vm = 24v, vref = 1.5v ratings parameter symbol conditions min typ max unit general vm current drain im ps = ?h?, no load 6 8 ma thermal shutdown temperature tsd design guarantee 180 c thermal hysteresis width tsd design guarantee 40 c reg5 output voltage vreg5 ireg5 = -1ma 4.5 5.0 5.5 v motor drivers [charge pump block] boost voltage vgh vm = 24v 28.0 28.7 29.8 v rise time tong vg = 10 f 50 100 ms oscillation frequency fcp chop = 20k 90 120 150 khz output block (out1/out2) ronu1 i o = -1.5a, source side 0.5 0.8 output on resistance rond2 i o = 1.5a, sink side 0.5 0.8 output leak current i o leak1 v o = 35v 50 a diode forward voltage vd1 id = -1.5a 1.0 1.3 v output block (out3/out4) ronu2 i o = -500ma, source side 1.5 1.8 output on resistance rond2 i o = 500ma, sink side 1.1 1.4 output leak current i o leak2 v o = 35v 50 a diode forward voltage vd2 id = -500ma 1.0 1.3 v logic input block i in l v in = 0.8v 3 8 15 a logic pin input current i in h v in = 5v 30 50 70 a logic high-level input voltage v in h 2.0 v logic low-level input voltage v in l 0.8 v current control block vref input current iref vref = 1.5v -0.5 a chopping frequency fchop chop = 20k 45 62.5 75 khz vhh vref = 1.5v, i0 = h, i1 = h 0.291 0.300 0.309 v vlh vref = 1.5v, i0 = l, i1 = h 0.191 0.200 0.209 v threshold voltage of current setting comparator vhl vref = 1.5v, i0 = h, i1 = l 0.093 0.100 0.107 v output short-circuit protection circuit charge current iocp vocp = 0v 15 20 25 a threshold voltage vthocp 0.8 1.0 1.2 v switching regulator controller [reference voltage block] reg25 output voltage vreg25 ireg25 = -1ma 2.475 2.500 2.525 v input stability v dl i vm = 10 to 35v 10 mv load stability v dl o ireg25 = 0 to -3ma 10 mv internal regulator block regvm5 output voltage vregvm5 vregvm5 = 1ma vm-6.0 vm-5.0 v continued on next page.
lv8747ta no.a2019-3/20 continued from preceding page. ratings parameter symbol conditions min typ max unit triangular wave oscillator block oscillation frequency fosc rt = 20k , ct = 620pf 72 80 88 khz frequency fluctuation fdv vm = 10 to 35v 1 5 % current setting pin voltage vrt rt = 20k 0.91 0.98 1.05 v protective circuit block threshold voltage of comparator vthfb fb5, fb6 1.40 1.55 1.70 v standby voltage vstscp iscp = 40 a 100 mv source current iscp vscp = 0v 1.6 2.5 3.4 a threshold voltage vths cp 1.65 1.8 1.95 v latch voltage vltscp iscp = 40 a 100 mv soft start circuit block source current isoft vsoft = 0v 1.3 1.6 1.9 a latch voltage vltsoft isoft = 40 a 100 mv low-input malfunction preventive circuit block threshold voltage vut 8.3 8.7 9.1 v hysteresis voltage vhis 240 340 440 mv error amplifier block input offset voltage v i o 6 mv input offset current i i o 30 na input bias current i i b 100 na open open gain av 85 db common-phase input voltage range vcm vm = 10 to 35v 3.0 v common phase removal ratio cmrr 80 db max output voltage v o h 4.5 5.0 v min output voltage v o l 0.2 0.5 v output sink current isi fb = 2.5v 300 600 1000 a output source current iso fb = 2.5v 45 75 105 a pwm comparator block vt100 duty cycle = 100% 0.95 1.01 1.07 v input threshold voltage (fosc = 10khz) vt0 duty cycle = 0% 0.49 0.52 0.55 v input bias current ibdt dt6 = 0.4v 1 a max duty cycle 1 (fosc = 80khz) don1 5ch internally fixed 94 % max duty cycle 2 (fosc = 160khz) don2 5ch internally fixed 92 % max duty cycle 3 (fosc = 10khz) don3 6ch vreg25 divided by 17k and 8k 56 65 74 % output block ronu3 i o = -200ma, source side 10 12 output on resistance rond3 i o = 200ma, sink side 6 8 leak current ileak v o = 35v 5 a
lv8747ta no.a2019-4/20 pin assignment package dimensions unit : mm (typ) 3422 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 lv8747ta top view gnd pha4 out4b rnf4 out4a vm34 out3b rnf3 out3a pgnd3 i03 i13 pha3 i02 i12 pha2 pgnd2 out2b out2b rnf2 rnf2 out2a out2a vm12 vm12 out1b out1b rnf1 rnf1 out1a out1a pgnd1 i14 i04 ps vref34 ocp ocpm out5 out6 regvm5 gnd non5 inv5 fb5 non6 inv6 fb6 dt6 rt ct reg25 reg5 scp soft vmsw vref12 chop cp1 cp2 vg i01 i11 pha1 sanyo : tqfp64l(7x7) 9.0 (4.0) (4.0) 9.0 0.1 0.5 7.0 0.4 (0.5) (1.0) 1.2 max 7.0 1 2 64 0.18 0.125 top view side view side view bottom view exposed die-pad
lv8747ta no.a2019-5/20 substrate specifications (substrate recommended for operation of lv8747ta) size : 100mm 100mm 1.6mm (four-layer substrate [2s2p]) material : glass epoxy copper wiring density : l1 = 85% / l4 = 90% l1 : copper wiring pattern diagram l4 : copper wiring pattern diagram cautions 1) the data for the case with the exposed die-pad substrate mounted shows the values when 80% or more of the exposed die-pad is wet. 2) for the set design, employ the derating design with sufficient margin. stresses to be derated include the voltage, current, junctio n temperature, power loss, and mechanical stresses such as vibration, impact, and tension. accordingly, the design must ensure these stresses to be as low or small as possible. the guideline for ordinary derating is shown below : (1)maximum value 80% or less for the voltage rating (2)maximum value 80% or less for the current rating (3)maximum value 80% or less for the temperature rating 3) after the set design, be sure to verify the design with the actual product. confirm the solder joint state and verify also the re liability of solder joint for the exposed die-pad, etc. any void or deterioration, if observed in the solder jo int of these parts, causes deteriorated thermal conduction, possibly resulting in thermal destruction of ic. 0 2.0 2.40 4.0 4.85 6.0 2.52 1.25 ? 20 40 60 80 20 010 0 ambient temperature, ta ? c allowable power dissipation, pd max ? w pd max ? ta four-layer substrate *1 four-layer substrate *2 *1 with exposed die-pad substrate *2 without exposed die-pad
lv8747ta no.a2019-6/20 block diagram vref34 i13 i14 regvm5 5v dt6 i04 ocpm ocp pha3 pha4 i03 vm vm-5v rnf3 ct reg25 vmsw reg5 non5 non6 inv5 fb5 inv6 fb6 soft scp rt out3a out3b out4a out4b out6 out5 rnf4 vm34 + - + - + - + - - + + - + - + - + + - + - - gnd i10 chop i11 i12 i02 pha1 pha2 ps gnd tsd lvs pgnd3 v ref12 pgnd2 pgnd1 vmsw charge pump output control logic current selection dac current selection dac current selection dac current selection dac triangular wave oscillator 2.5v reference voltage constant current internal reference voltage internal ; reference voltage output control logic output control logic output preamplifier stage output preamplifier stage output preamplifier stage output preamplifier stage output preamplifier stage output preamplifier stage output preamplifier stage output preamplifier stage output control logic short-circuit protection circuit over-current protection circuit 5v cp1 cp2 vg rnf1 out1a out1b out2a out2b rnf2 vm12 + - + - + - + - - oscillation circuit
lv8747ta no.a2019-7/20 pin functions pin no pin description 24 25 vm12 driver 1/2ch pin to connect to power supply 30 31 out1a driver 1ch outa output pin 26 27 out1b driver 1ch outb output pin 28 29 rnf1 driver 1ch current sense resistor connection pin 22 23 out2a driver 2ch outa output pin 18 19 out2b driver 2ch outb output pin 20 21 rnf2 driver 2ch current sense resistor connection pin 35 i01 34 i11 driver 1ch output current setting input pin 33 pha1 driver 1ch output phase shift input pin 14 i02 15 i12 driver 2ch output current setting input pin 16 pha2 driver 2ch output phase shift input pin 40 vref12 driver 1/2ch output current setting reference voltage input pin 32 pgnd1 driver output power gnd 17 pgnd2 driver output power gnd 6 vm34 driver 3/4ch power connection pin 9 out3a driver 3ch outa output pin 7 out3b driver 3ch outb output pin 8 rnf3 driver 3ch current sense resistor connection pin 5 out4a driver 4ch outa output pin 3 out4b driver 4ch outb output pin 4 rnf4 driver 4ch current sense resistor connection pin 11 i03 12 i13 driver 3ch output current setting input pin 13 pha3 driver 3ch output phase shift input pin 63 i04 64 i14 driver 4ch output current setting input pin 2 pha4 driver 4ch output phase shift input pin 61 vref34 driver 3/4ch output current setting reference voltage input pin 10 pgnd3 driver output power gnd 60 ocp pin to connect to the output short-ci rcuit state detection time setting capacitor 59 ocpm over-current mode changeover pin 39 chop pin to connect to the resistor to set the chopping frequency 62 ps driver power save input pin 36 vg charge pump capacitor connection pin 38 cp1 charge pump capacitor connection pin 37 cp2 charge pump capacitor connection pin 41 vmsw power connection pin 44 reg5 internal regulator output pin 56 regvm5 internal regulator output pin 45 reg25 regulator reference voltage output pin 46 ct regulator timing capacity external pin 47 rt regulator timing resistor external pin 42 soft regulator soft start setting pin 43 scp regulator timer and latch setting pin 54 non5 regulator error amplifier 5 input + pin continued on next page.
lv8747ta no.a2019-8/20 continued from preceding page. pin no pin description 53 inv5 regulator error amplifier 5 input ? pin 52 fb5 regulator error amplifier 5 output pin 58 out5 regulator output 5 51 non6 regulator error amplifier 6 input + pin 50 inv6 regulator error amplifier 6 input ? pin 49 fb6 regulator error amplifier 6 output pin 57 out6 regulator output 6 48 dt6 regulator output 6 max duty setting pin 55 gnd ground 1 gnd ground
lv8747ta no.a2019-9/20 equivalent circuits pin no. pin name equivalent circuit 2 11 12 13 14 15 16 33 34 35 59 62 63 64 pha4 i03 i13 pha3 i02 i12 pha2 pha1 i11 i01 ocpm ps i04 i14 10k 100k reg5 gnd 36 37 38 vg cp2 cp1 reg5 gnd 38 37 36 100 vmsw 3 4 5 6 7 8 9 10 out4b rnf4 out4a vm34 out3b rnf3 out3a pgnd3 reg5 gnd 9 5 7 3 6 8 4 10 500 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 pgnd2 out2b out2b rnf2 rnf2 out2a out2a vm12 vm12 out1b out1b rnf1 rnf1 out1a out1a pgnd1 reg5 gnd 23 22 27 26 25 21 20 17 24 31 30 19 18 29 28 32 500 continued on next page.
lv8747ta no.a2019-10/20 continued from preceding page. pin no. pin name equivalent circuit 40 61 vref12 vref34 reg5 gnd 500 39 chop reg5 gnd 1k 60 ocp reg5 gnd 500 44 reg5 vmsw gnd 2k 74k 26k 45 reg25 vmsw gnd 5k 6.25k reg5 continued on next page.
lv8747ta no.a2019-11/20 continued from preceding page. pin no. pin name equivalent circuit 49 50 51 52 53 54 fb6 inv6 non6 fb5 inv5 non5 vmsw gnd 500 reg5 53 50 51 54 vmsw 2k 2k vmsw 49 52 500 500 48 dt6 vmsw gnd 500 reg5 46 47 ct rt gnd 500 reg5 500 500 500 500 vmsw 46 47 57 58 out6 out5 regvm5 vmsw continued on next page.
lv8747ta no.a2019-12/20 continued from preceding page. pin no. pin name equivalent circuit 56 regvm5 gnd 150k 65k vmsw 42 soft gnd 500 500 vmsw reg5 43 scp gnd 500 vmsw reg5
lv8747ta no.a2019-13/20 stepping motor driver out1/out2 (out3/out4) (1) output control logic parallel input (note) output ps pha outa outb current direction low * off off standby high low low high outb outa high high high low outa outb (note) : enter either ?h? or ?l? externally for the logi c input pin. never use the input pin in the open state. (2) constant-current setting i0 (note) i1 (note) output current high high i o = (vref/5) /rnf low high i o = ((vref/5) /rnf) 2/3 high low i o = ((vref/5) /rnf) 1/3 low low i o = 0 (note) : enter either ?h? or ?l? externally for the logi c input pin. never use the input pin in the open state. set current calculation method the constant-current control setting of stm driver is determined as follows from the setting of vref voltage, and i0 and i1, and resistor (rnf) connected between rnf and gnd : iconst [a] = ((vref [v] /5) /rnf [ ]) attenuation factor (example) for vref = 1.5v, i0 = i1 = ?h? and rnf = 1 ; iconst = 1.5v/5/1 1 = 0.3a (3) setting the chopping frequency for constant-current control, chopping operation is made with the frequency determined by the external resistor (connected to the chop pin). the chopping frequency to be set with the resistance connected to the chop pin (pin 39) is as shown below. the recommended chopping frequency ranges from 30khz to 120khz. 0 40 80 60 20 140 120 100 040 30 50 60 70 20 10 80 chop resistance (k ) chopping frequency (khz) chopping frequency
lv8747ta no.a2019-14/20 fast slow charge fast slow charge current mode fchop coil current step set current set current forced charge section forced charge section fast slow fast slow charge current mode fchop coil current step set current set current forced charge section charge (4) constant-current control time chart (chopping operation) (sine wave increasing direction) (sine wave decreasing direction) in each current mode, the operation sequence is as described below : ? at rise of chopping frequency, the chargte mode begins.(the section in which the charge mode is forced regardless of the magnitude of the coil current (icoil) and set current (iref) exists for 1/16 of one chopping cycle.) ? the coil current (icoil) and set current (iref) ar e compared in this forced charge section. when (icoil lv8747ta no.a2019-15/20 (5) output current vector locus (one step is normalized to 90 degrees) (6) typical current waveform in each excitation mode two-phase excitation (1/2ch, cw mode) 0.0 33.3 66.7 100.0 0.0 33.3 66.7 100. 0 channel 2 phase current ratio 2-phase commutation position channel 1 phase current ratio h i01,i11 i02,i12 pha1 pha2 i out 2 i out 1 100 0 -100 100 0 -100 h (%) (%)
lv8747ta no.a2019-16/20 1-2 phase excitation (1/2ch, cw mode) w1-2 phase excitation (1/2ch, cw mode) i11 pha1 i02 i12 pha2 (%) (%) 100 0 -100 100 0 -100 i out 1 i out 2 i01 i11 pha1 i02 i12 pha2 (%) (%) 100 0 -100 100 0 -100 i out 1 i out 2 i01 pca01195 pca01196
lv8747ta no.a2019-17/20 output short-circuit protection circuit to protect ic from damage due to short-circuit of the output caused by lightening or ground fault, the output short-circuit protection circuit to put the output in the standby mode is incorporated. (1) output short-circuit protec tion operation changeover function changeover to the output short-circuit protection of ic is made by the setting of ocpm pin. ocpm state ?low? auto reset method ?high? latch method (auto reset method) when the output current is below the output short-circuit prot ection current, the output is controlled by the input signal. when the output current exceeds the detection current, th e switching waveform as shown below appears instead. when detecting the output short-circuit state, the short-circuit detection circuit is activated. when the short-circuit detection circuit operation exceeds the timer latch time described later, the output is changed over to the standby mode and reset to the on mode again in 256 s (typ). in this event, if the over-current mode still continues, the above switching mode is repeated till the over-current mode is canceled. (latch method) similarly to the case of automatic reset method, the short-circuit detection circuit is activated when it detects the output short-circuit state. when the short-circuit detection circuit operation exceeds the timer latch time described later, the output is changed over to the standby mode. in this method, latch is released by setting ps = ?l? (2) ocp pin constant setting method (timer latch setting) connect c between the ocp pin and gnd, and the time up to the output off can be set in case of output short-circuit. the c value can be determined as follows : timer latch : tocp tocp c v/i [s] v : threshold voltage typ 1v i : ocp charge current typ 20 a (c: recommended constant value 100pf to 200pf) on 1v ocp voltage output current exceeding the over-current detection current off 0.5 to 1 s 256 s (typ) off on on
lv8747ta no.a2019-18/20 switching regulator controller (1) regulator block diagram maxduty setting pin 5ch internally fixed + + - + - + + - - - 1.55v fb soft scp regvm5 vm-5v vm regout out inv non reg25 reg5 vmsw dt ct rt 5v 5v 5v 5v vm 0.5v 1.0v 5v 2.5v 1.6 a 2.5 a 5v lvs internal reference voltage internal reference voltage 2.5v reference voltage triangle wave constant current constant current short-circuit protection circuit triangle wave oscillator error amplifier 5v pwm comparator 5v fb comparator 5v high during protection circuit operation high during lvs operation soft start setting pin timer/latch setting pin (2) timing chart 1.55v short-circuit protection comparator reference voltage oscillator triangular wave output (ct) max_duty setting voltage (dt) error amplifier output (fb) output (out) triangular wave conversion output short-circuit protection comparator output latch output scp pin waveform soft pin waveform vmsw supply voltage 1.0v 0.5v 1.8v 9.1v (1) (2)
lv8747ta no.a2019-19/20 (3) soft pin constant setting method (soft start setting) the switching regulator can be set to soft-start by connecting c between the soft pin and gnd. determine the c value as follows : soft start time : tsoft tsoft c v/i [s] v : error amplifier input + pin voltage (non5/non6) i : soft charge current typ 1.6 a (4). scp pin constant setting method (timer latch setting) the time up to the output off in case of regulator output short-circuit can be set by connecting c between the scp pin and gnd. determine the c value as follows : timer latch : tscp tscp c v/i [s] v : threshold voltage typ 1.8v i : scp charge current typ 2.5 a (5) rt pin constant setting method (capacitor charge/discharge current setting) the ct pin capacitor charge/discharge current can be set for triangular wave generation by connecting r between the rt pin and gnd. determine the r value as follows : charge/discharge current : irt irt v/r [a] v : r pin voltage typ 0.98v (6) ct pin constant setting method (triangular wave oscillation frequency setting) the triangular wave oscillation can be set (together with th e setting of charge/discharge cu rrent setting of rt pin) by connecting c between the ct pin and gnd. determine the c value as follows : triangular wave oscillation frequency : fosc fosc 1/{2 c v/i} [hz] v : triangle wave amplitude typ 0.5v (fosc = 10khz) *note that the amplit ude increases with the frequency. i : capacitor charge/discharge current. see the rt pin constant setting method of (5).
lv8747ta ps no.a2019-20/20 application circuit 620pf logic input 100pf 1.5v +- +- 24v + - + - 1.5v +- +- lv8747ta 64 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 logic input logic input gnd pha4 out4b rnf4 out4a vm34 out3b rnf3 out3a pgnd3 i03 i13 pha3 i02 i12 pha2 pgnd2 out2b out2b rnf2 rnf2 out2a out2a vm12 vm12 out1b out1b rnf1 rnf1 out1a out1a pgnd1 i14 i04 ps vref34 ocp ocpm out5 out6 regvm5 gnd non5 inv5 fb5 non6 inv6 fb6 dt6 rt ct reg25 reg5 scp soft vmsw vref12 chop cp1 cp2 vg i01 i11 pha1 on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.

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