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| mosfet metaloxidesemiconductorfieldeffecttransistor coolmos?c7 650vcoolmos?c7powertransistor IPL65R195C7 datasheet rev.2.0 final powermanagement&multimarket
2 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet thinpak8x8 1description coolmos?isarevolutionarytechnologyforhighvoltagepower mosfets,designedaccordingtothesuperjunction(sj)principleand pioneeredbyinfineontechnologies. coolmos?c7seriescombinestheexperienceoftheleadingsj mosfetsupplierwithhighclassinnovation.theproductportfolio providesallbenefitsoffastswitchingsuperjunctionmosfetsoffering betterefficiency,reducedgatecharge,easyimplementationand outstandingreliability. features ?increasedmosfetdv/dtruggedness ?betterefficiencyduetobestinclassfomr ds(on) *e oss andr ds(on) *q g ? thinpak smdpackagewithverylowparasiticinductancetoenablefast andreliableswitchingwithminimumofsizetoincreasepower-density ?easytouse/drivedueto driversourcepin forbettercontrolofthegate. ?pb-freeplating,halogenfreemoldcompound ?qualifiedforindustrialgradeapplicationsaccordingtojedec(j-std20 andjesd22) benefits ?enablinghighersystemefficiencybylowerswitchinglosses ?enablinghigherfrequency/increasedpowerdensitysolutions ?systemcost/sizesavingsduetoreducedcoolingrequirements ?highersystemreliabilityduetoloweroperatingtemperatures applications pfcstagesandhardswitchingpwmstagesfore.g.computing,server, telecom,upsandsolar. pleasenote:formosfetparallelingtheuseofferritebeadsonthegate orseparatetotempolesisgenerallyrecommended. table1keyperformanceparameters parameter value unit v ds @ t j,max 700 v r ds(on),max 195 m w q g.typ 23 nc i d,pulse 49 a e oss @400v 2.7 j body diode di/dt 55 a/s type/orderingcode package marking relatedlinks IPL65R195C7 pg-vson-4 65c7195 see appendix a drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 3 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet tableofcontents description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 appendix a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 4 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet 2maximumratings at t j =25c,unlessotherwisespecified table2maximumratings values min. typ. max. parameter symbol unit note/testcondition continuous drain current 1) i d - - - - 12 8 a t c =25c t c =100c pulsed drain current 2) i d,pulse - - 49 a t c =25c avalanche energy, single pulse e as - - 57 mj i d =5.4a; v dd =50v; see table 10 avalanche energy, repetitive e ar - - 0.29 mj i d =5.4a; v dd =50v; see table 10 avalanche current, single pulse i as - - 5.4 a - mosfet dv/dt ruggedness dv/dt - - 100 v/ns v ds =0...400v gate source voltage (static) v gs -20 - 20 v static; gate source voltage (dynamic) v gs -30 - 30 v ac (f>1 hz) power dissipation p tot - - 75 w t c =25c storage temperature t stg -40 - 150 c - operating junction temperature t j -40 - 150 c - mounting torque - - - n.a. ncm - continuous diode forward current i s - - 12 a t c =25c diode pulse current 2) i s,pulse - - 49 a t c =25c reverse diode dv/dt 3) dv/dt - - 1 v/ns v ds =0...400v, i sd <= i s , t j =25c see table 8 maximum diode commutation speed di f /dt - - 55 a/ m s v ds =0...400v, i sd <= i s , t j =25c see table 8 insulation withstand voltage v iso - - n.a. v v rms , t c =25c, t =1min 1) limited by t j max . 2) pulse width t p limited by t j,max 3) identicallowsideandhighsideswitchwithidentical r g drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 5 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet 3thermalcharacteristics table3thermalcharacteristics values min. typ. max. parameter symbol unit note/testcondition thermal resistance, junction - case r thjc - - 1.66 c/w - thermal resistance, junction - ambient r thja - - 62 c/w device on pcb, minimal footprint thermal resistance, junction - ambient for smd version r thja - 35 45 c/w device on 40mm*40mm*1.5mm epoxy pcb fr4 with 6cm2 (one layer, 70m thickness) copper area for drain connection and cooling. pcb is vertical without air stream cooling. reflow soldering temperature t sold - - 260 c reflow msl3 drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 6 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet 4electricalcharacteristics at t j =25c,unlessotherwisespecified table4staticcharacteristics values min. typ. max. parameter symbol unit note/testcondition drain-source breakdown voltage v (br)dss 650 - - v v gs =0v, i d =1ma gate threshold voltage v (gs)th 3 3.5 4 v v ds = v gs , i d =0.29ma zero gate voltage drain current i dss - - - 10 1 - m a v ds =650, v gs =0v, t j =25c v ds =650, v gs =0v, t j =150c gate-source leakage current i gss - - 100 na v gs =20v, v ds =0v drain-source on-state resistance r ds(on) - - 0.173 0.414 0.195 - w v gs =10v, i d =2.9a, t j =25c v gs =10v, i d =2.9a, t j =150c gate resistance r g - 1.1 - w f =1mhz,opendrain table5dynamiccharacteristics values min. typ. max. parameter symbol unit note/testcondition input capacitance c iss - 1150 - pf v gs =0v, v ds =400v, f =250khz output capacitance c oss - 17 - pf v gs =0v, v ds =400v, f =250khz effective output capacitance, energy related 1) c o(er) - 34 - pf v gs =0v, v ds =0...400v effective output capacitance, time related 2) c o(tr) - 374 - pf i d =constant, v gs =0v, v ds =0...400v turn-on delay time t d(on) - 9 - ns v dd =400v, v gs =13v, i d =2.9a, r g =10 w ;seetable9 rise time t r - 5 - ns v dd =400v, v gs =13v, i d =2.9a, r g =10 w ;seetable9 turn-off delay time t d(off) - 75 - ns v dd =400v, v gs =13v, i d =2.9a, r g =10 w ;seetable9 fall time t f - 16 - ns v dd =400v, v gs =13v, i d =2.9a, r g =10 w ;seetable9 table6gatechargecharacteristics values min. typ. max. parameter symbol unit note/testcondition gate to source charge q gs - 6 - nc v dd =400v, i d =2.9a, v gs =0to10v gate to drain charge q gd - 7 - nc v dd =400v, i d =2.9a, v gs =0to10v gate charge total q g - 23 - nc v dd =400v, i d =2.9a, v gs =0to10v gate plateau voltage v plateau - 5.0 - v v dd =400v, i d =2.9a, v gs =0to10v 1) c o(er) isafixedcapacitancethatgivesthesamestoredenergyas c oss while v ds isrisingfrom0to400v 2) c o(tr) isafixedcapacitancethatgivesthesamechargingtimeas c oss while v ds isrisingfrom0to400v drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 7 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet table7reversediodecharacteristics values min. typ. max. parameter symbol unit note/testcondition diode forward voltage v sd - 0.8 - v v gs =0v, i f =2.9a, t j =25c reverse recovery time t rr - 700 - ns v r =400v, i f =12a,d i f /d t =55a/s; see table 8 reverse recovery charge q rr - 5.8 - c v r =400v, i f =12a,d i f /d t =55a/s; see table 8 peak reverse recovery current i rrm - 16 - a v r =400v, i f =12a,d i f /d t =55a/s; see table 8 drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 8 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet 5electricalcharacteristicsdiagrams diagram1:powerdissipation t c [c] p tot [w] 0 25 50 75 100 125 150 0 10 20 30 40 50 60 70 80 p tot =f( t c ) diagram2:safeoperatingarea v ds [v] i d [a] 10 0 10 1 10 2 10 3 10 -3 10 -2 10 -1 10 0 10 1 10 2 1 s 10 s 100 s 1 ms 10 ms dc i d =f( v ds ); t c =25c; d =0;parameter: t p diagram3:safeoperatingarea v ds [v] i d [a] 10 0 10 1 10 2 10 3 10 -3 10 -2 10 -1 10 0 10 1 10 2 1 s 10 s 100 s 1 ms 10 ms dc i d =f( v ds ); t c =80c; d =0;parameter: t p diagram4:max.transientthermalimpedance t p [s] z thjc [k/w] 10 -5 10 -4 10 -3 10 -2 10 -1 10 -2 10 -1 10 0 10 1 0.5 0.2 0.1 0.05 0.02 0.01 single pulse z thjc =f( t p );parameter: d=t p / t drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 9 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet diagram5:typ.outputcharacteristics v ds [v] i d [a] 0 5 10 15 20 0 10 20 30 40 50 20 v 10 v 8 v 7 v 6 v 5.5 v 5 v 4.5 v i d =f( v ds ); t j =25c;parameter: v gs diagram6:typ.outputcharacteristics v ds [v] i d [a] 0 5 10 15 20 0 5 10 15 20 25 30 20 v 10 v 8 v 7 v 6 v 5.5 v 5 v 4.5 v i d =f( v ds ); t j =125c;parameter: v gs diagram7:typ.drain-sourceon-stateresistance i d [a] r ds(on) [ w ] 0 5 10 15 20 25 30 35 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 20 v 5.5 v 6 v 6.5 v 7 v 10 v r ds(on) =f( i d ); t j =125c;parameter: v gs diagram8:drain-sourceon-stateresistance t j [c] r ds(on) [ w ] -50 -25 0 25 50 75 100 125 150 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 98% typ r ds(on) =f( t j ); i d =2.9a; v gs =10v drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 10 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet diagram9:typ.transfercharacteristics v gs [v] i d [a] 0 2 4 6 8 10 12 0 10 20 30 40 50 60 150 c 25 c i d =f( v gs ); v ds =20v;parameter: t j diagram10:typ.gatecharge q gate [nc] v gs [v] 0 5 10 15 20 25 30 0 2 4 6 8 10 12 400 v 120 v v gs =f( q gate ); i d =2.9apulsed;parameter: v dd diagram11:forwardcharacteristicsofreversediode v sd [v] i f [a] 0.0 0.5 1.0 1.5 10 -1 10 0 10 1 10 2 125 c 25 c i f =f( v sd );parameter: t j diagram12:avalancheenergy t j [c] e as [mj] 25 50 75 100 125 150 0 5 10 15 20 25 30 35 40 45 50 55 60 e as =f( t j ); i d =5.4a; v dd =50v drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 11 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet diagram13:drain-sourcebreakdownvoltage t j [c] v br(dss) [v] -60 -20 20 60 100 140 180 580 600 620 640 660 680 700 720 740 760 v br(dss) =f( t j ); i d =1ma diagram14:typ.capacitances v ds [v] c [pf] 0 100 200 300 400 500 10 0 10 1 10 2 10 3 10 4 10 5 ciss coss crss c =f( v ds ); v gs =0v; f =250khz diagram15:typ.cossstoredenergy v ds [v] e oss [j] 0 100 200 300 400 500 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 e oss = f (v ds ) drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 12 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet 6testcircuits table8diodecharacteristics table9switchingtimes(ss) table10unclampedinductiveload(ss) drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v d v ( br ) ds i d v ds v ds i d 13 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet 7packageoutlines figure1outlinepg-vson-4,dimensionsinmm/inches drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v d v ( br ) ds i d v ds v ds i d 14 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet 8appendixa table11relatedlinks ? ifxcoolmos tm c7webpage: www.infineon.com ? ifxcoolmos tm c7applicationnote: www.infineon.com ? ifxcoolmos tm c7simulationmodel: www.infineon.com ? ifxdesigntools: www.infineon.com drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v d v ( br ) ds i d v ds v ds i d 15 650vcoolmos?c7powertransistor IPL65R195C7 rev.2.0,2013-11-06 final data sheet revisionhistory IPL65R195C7 revision:2013-11-06,rev.2.0 previous revision revision date subjects (major changes since last revision) 2.0 2013-11-06 release of final version welistentoyourcomments anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com edition2011-08-01 publishedby infineontechnologiesag 81726mnchen,germany ?2011infineontechnologiesag allrightsreserved. legaldisclaimer theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.with respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,infineontechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. information forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestinfineon technologiesoffice( www.infineon.com ). warnings duetotechnicalrequirements,componentsmaycontaindangeroussubstances.forinformationonthetypesinquestion, pleasecontactthenearestinfineontechnologiesoffice. theinfineontechnologiescomponentdescribedinthisdatasheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofinfineontechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. drain pin 5 gate pin 1 power source pin 3,4 driver source pin 2 test circuit for diode characteristics diode recovery waveform t v , i i rrm i f v ds 10 % i rrm t rr t f t s q f q s di f / dt di rr / dt v ds ( peak ) q rr = q f + q s t rr = t f + t s v ds i f v ds i f r g 1 r g 2 r g 1 = r g 2 switching times test circuit for inductive load switching times waveform v ds v gs t d ( on ) t d ( off ) t r t on t f t off 10 % 90 % v ds v gs unclamped inductive load test circuit unclamped inductive waveform v ds v d v ( br ) ds i d v ds v ds i d |
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