1/8 february 2004 stY60NK30Z n-channel 300v - 0.033 ? - 60a max247 zener-protected supermesh?power mosfet typical r ds (on) = 0.033 ? extremely high dv/dt capability 100% avalanche tested gate charge minimized very low intrinsic capacitances very good manufacturing repeatibility description the supermesh? series is obtained through an extreme optimization of st?s well established strip- based powermesh? layout. in addition to pushing on-resistance significantly down, special care is tak- en to ensure a very good dv/dt capability for the most demanding applications. such series comple- ments st full range of high voltage mosfets in- cluding revolutionary mdmesh? products. applications high current, high efficiency switching dc/dc conveters for plasma tv?s ideal for off-line power supplies, adaptors and pfc ordering information type v dss r ds(on) i d pw stY60NK30Z 300 v < 0.045 ? 60 a 450 w sales type marking package packaging stY60NK30Z Y60NK30Z max247 tube max247 1 2 3 internal schematic diagram free datasheet http://
stY60NK30Z 2/8 absolute maximum ratings ( ) pulse width limited by safe operating area (1) i sd 60a, di/dt 200a/s, v dd v (br)dss ,t j t jmax. thermal data avalanche characteristics gate-source zener diode protection features of gate-to-source zener diodes the built-in back-to-back zener diodes have specifically been designed to enhance not only the device?s esd capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. in this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device?s integrity. these integrated zener diodes thus avoid the usage of external components. symbol parameter value unit v ds drain-source voltage (v gs =0) 300 v v dgr drain-gate voltage (r gs =20k ? ) 300 v v gs gate- source voltage 30 v i d drain current (continuous) at t c = 25c 60 a i d drain current (continuous) at t c = 100c 37.5 a i dm ( ) drain current (pulsed) 240 a p tot total dissipation at t c = 25c 450 w derating factor 3.57 w/c v esd(g-s) gate source esd(hbm-c=100 pf, r=1.5 k ?) 6000 v dv/dt (1) peak diode recovery voltage slope 4.5 v/ns t j t stg operating junction temperature storage temperature -55 to 150 c rthj-case thermal resistance junction-case max 0.28 c/w rthj-amb thermal resistance junction-ambient max 30 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 60 a e as single pulse avalanche energy (starting t j =25c,i d =i ar ,v dd =50v) 0.7 j symbol parameter test conditions min. typ. max. unit bv gso gate-source breakdown voltage igs= 1ma (open drain) 30 v free datasheet http://
3/8 stY60NK30Z electrical characteristics (t case =25c unless otherwise specified) on/off dynamic switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. 3. c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss . symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d =1ma,v gs = 0 300 v i dss zero gate voltage drain current (v gs =0) v ds =maxrating v ds =maxrating,t c = 125 c 1 50 a a i gss gate-body leakage current (v ds =0) v gs = 20 v 10 a v gs(th) gate threshold voltage v ds =v gs ,i d = 100 a 3 3.75 4.5 v r ds(on) static drain-source on resistance v gs =10v,i d = 30 a 0.033 0.045 ? symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds =15v , i d =30a 29 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds =25v,f=1mhz,v gs = 0 7200 1070 250 pf pf pf c oss eq. (3) equivalent output capacitance v gs =0v,v ds = 0v to 240v 880 pf symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd =150v,i d =30a r g =4.7 ? , v gs =10v (resistive load see, figure 3) 50 90 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd =240v,i d =60a, v gs =10v 220 46 123 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd =150v,i d =30a r g =4.7 ? ,v gs =10v (resistive load see, figure 3) 150 60 ns ns t r(voff) t f t c off-voltage rise time fall time cross-over time v dd =240v,i d =60a, r g =4.7 ?, v gs = 10v (inductive load see, figure 5) 40 65 110 ns ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm (2) source-drain current source-drain current (pulsed) 60 240 a a v sd (1) forwardonvoltage i sd =60a,v gs =0 1.6 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd =60a,di/dt=100a/s v r = 100 v, t j =150c (see test circuit, figure 5) 475 6.4 27 ns c a free datasheet http://
stY60NK30Z 4/8 transconductance static drain-source on resistance transfer characteristics output characteristics safe operating area thermal impedance free datasheet http://
5/8 stY60NK30Z source-drain diode forward characteristics normalized on resistance vs temperature normalized gate thereshold voltage vs temp. capacitance variations gate charge vs gate-source voltage free datasheet http://
stY60NK30Z 6/8 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load free datasheet http://
7/8 stY60NK30Z dim. mm inch min. typ. max. min. typ. max. a 4.70 5.30 a1 2.20 2.60 b 1.00 1.40 b1 2.00 2.40 b2 3.00 3.40 c 0.40 0.80 d 19.70 20.30 e 5.35 5.55 e 15.30 15.90 l 14.20 15.20 l1 3.70 4.30 p025q max247 mechanical data free datasheet http://
stY60NK30Z 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com free datasheet http://
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