p p ja 3422 may 21 ,2015 - rev.00 page 1 3 0 v n - c hannel enhancement mode mosfet C esd protected voltage 3 0 v current 4.2 a sot - 23 unit: inch(mm) f eatures ? rds(on) , vgs@ 10 v , id@ 4.2 a< 42 m ? ? rds(on) , vgs@ 4.5 v, id@ 3.5 a< 4 8 m ? ? rds(on) , vgs@ 2.5 v, id@ 2.8 a< 55 m ? ? advanced trench process technology ? specially designed for switch load, pwm application, etc ? esd protected 2kv hbm ? lead free in compliance with eu rohs 2011/65/eu directive . ? green molding compound as per iec61249 std. (h alogen free) mechanical data ? case: sot - 23 package ? terminals: solderable per mil - std - 750, method 2026 ? approx. weight: 0.0003 ounces, 0.0084 grams ? marking: a 22 parameter symbol limit units drain - source voltage v ds 30 v gate - source voltage v gs + 12 v continuous drain current i d 4. 2 a pulsed drain current i dm 1 6.8 a power dissipation t a =25 o c p d 1. 25 w derate above 25 o c 1 0 m w/ o c operatin g junction an d storage temperature range t j ,t stg - 55~150 o c typical thermal resistance - j unction to amb ient (note 3 ) r ja 10 0 o c /w maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted)
p p ja 3422 may 21 ,2015 - rev.00 page 2 e lectrical c haracteristics (t a =25 o c unless otherwise noted) parameter symbol test condition min. typ. max. units static drain - source bre akdown voltage bv dss v gs = 0 v, i d = 25 0ua 3 0 - - v gate threshold voltage v gs(th) v ds =v gs , i d = 250 ua 0.5 0.8 1.3 v drain - source on - state resistance r ds(on) v gs = 10 v, i d = 4.2 a - 32 4 2 m gs = 4.5 v, i d = 3.5 a - 3 5 4 8 v gs = 2.5 v, i d = 2.8 a - 4 4 55 zero gate volt age drain current i dss v ds = 30 v, v gs =0v - - 1 u a t j =55 o c - - 5 gate - source leakage current i gss v gs = + 12 v, v ds =0v - - + 10 u a dynamic (note 5 ) total gate charge q g v ds = 15 v, i d = 4.2 a, v gs = 4.5 v (note 1 , 2 ) - 5. 1 - nc gate - source charge q gs - 0.8 - ga te - drain charge q gd - 1. 4 - input capacitance ciss v ds = 1 5v, v gs = 0 v, f=1.0mhz - 4 21 - pf output capacitance coss - 4 3 - reverse transfer capacitance crss - 3 5 - turn - on delay time t d (on) v dd = 15 v, i d = 1 a, v g s = 10v, r g = 3 (note 1 , 2 ) - 2 .8 - ns turn - on rise time tr - 22 - turn - o ff delay time t d (off) - 21 - turn - o ff fall time tf - 16 - drain - source diode maximum continuous drain - source diode forward current i s --- - - 1 . 5 a diode forward voltage v sd i s = 1 . 0 a, v g s = 0 v - 0. 77 1.2 v notes : 1. pulse width < 300us, duty cycle < 2% 2. essentially independent of operating temperature typical characteristics . 3. r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is define d as the solder mounting surface of the drain pins m ounted on a 1 inch fr - 4 with 2oz . square pad of copper 4. the maximum current rating is package limited 5. guaranteed by design, not subject to product ion testing .
p p ja 3422 may 21 ,2015 - rev.00 page 3 t ypical characteristic curves fig. 1 on - region characteristics fig. 2 transfer characteristics fig. 3 on - resistance vs. drain current fig. 4 on - resistance vs. junction temperature fig. 5 on - resistance variation with vgs. fig. 6 body d i ode characteristics
p p ja 3422 may 21 ,2015 - rev.00 page 4 t ypical cha racteristic curves fig. 7 gate - charge characteristics fig. 8 threshold voltage variation with temperature fig. 9 capacitance vs. drain - source voltage .
p p ja 3422 may 21 ,2015 - rev.00 page 5 part no packing code version mounting pad layout part n o packing code package type packing type marking ver sion PJA3422 _r1_00001 sot - 23 3k pcs / 7
p p ja 3422 may 21 ,2015 - rev.00 page 6 disclaimer
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