kvr16lse11/4hb 4gb 1rx8 512m x 72-bit pc3l-12800 cl11 204-pin ecc sodimm description this document describes valueram's 512m x 72-bit (4gb) ddr3l-1600 cl11 sdram (synchronous dram), 1rx8, ecc, low voltage, memory module, based on nine 512m x 8-bit fbga components. the spd is programmed to jedec standard latency ddr3-1600 timing of 11-11-11 at 1.35v and backwards compatible at 1.5v. this 204-pin sodimm uses gold contact fingers. the electrical and mechanical specifications are as follows: features ? jedec standard 1.35v (1.28v ~ 1.45v) and 1.5v (1.425v ~ 1.575v) power supply ? vddq = 1.35v (1.28v ~ 1.45v) and 1.5v (1.425v ~ 1.575v) ? 800mhz fck for 1600mb/sec/pin ? 8 independent internal bank ? programmable cas latency: 5, 6, 7, 8, 9, 10, 11 ? programmable additive latency: 0, cl - 2, or cl - 1 clock ? 8-bit pre-fetch ? burst length: 8 (interleave without any limit, sequential with starting address ?000? only), 4 with tccd = 4 which does not allow seamless read or write [either on the fly using a12 or mrs] ? bi-directional differential data strobe ? with integrated onboard temperature sensor eeprom ? internal(self) calibration : internal self calibration through zq pin (rzq : 240 ohm 1%) ? on die termination using odt pin ? average refresh period 7.8us at lower than tcase 85c, 3.9us at 85c < tcase < 95c ? asynchronous reset ? pcb: height 1.18? (30mm), double sided component document no. valueram1463-001.a00 04/01/15 page 1 memory module speci cations continued >> specifications s e l c y c 1 1 ) d d i ( l c row cycle time (trcmin) 48.125ns (min.) refresh to active/refresh 260ns (min.) command time (trfcmin) row active time (trasmin) 35ns (min.) maximum operating power (1.35v) = 1.46 w* 0 - v 4 9 g n i t a r l u operating temperature 0 o c to 85 o c storage temperature -55 o c to +100 o c *power will vary depending on the sdram. sdram supported hynix (b-die)
document no. valueram1463-001.a00 page 2
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