ts m 0 38 n 03 tai wan semiconductor document number: d s_p0000 163 1 version: a 15 n - channel power mosfet 3 0 v, 8 0 a, 3.8m features 100% avalanche tested fast switching pb - free plating rohs compliant halogen - free mold compound key performance parameters p arameter value unit v ds 3 0 v r ds(on) (max) v gs =10v 3.8 m v gs = 4.5 v 5.5 q g 24 nc a pplication mobile device dc - dc conversion point of load (pol) dc - dc secondary switch re ctification pdfn33 notes: moisture sensitivity level: level 3. p er j - std - 020 absolute m aximum ratings ( t a = 25 c unless otherwise noted ) p arameter s ymbol l imit unit drain - source voltage v ds 3 0 v g ate - source voltage v gs 2 0 v continuous drain current (note 1 ) t c = 25 c i d 8 0 a t c = 100 c 51 pulsed drain current (note 2 ) i dm 32 0 a single pulsed avalanche energy (note 3 ) e as 125 mj single pulsed avalanche current (note 3 ) i as 50 a total power dissipation @ t c = 25 c p dtot 66 w operating junction and storage temperature range t j , t stg - 55 to +1 50 c thermal performance p arameter s ymbol limit unit junction to case thermal resistance r ? j c 2 o c/w junction to ambient thermal resistance r ? ja 62 o c/w notes: r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistances. the case thermal reference is defined at the solder mounting surface of the drain pins. r ? ja is guaranteed by design while r ? ca is determined by the users bo ard design. r ? ja shown below for single device operation on fr - 4 pcb in still air
ts m 0 38 n 03 tai wan semiconductor document number: d s_p0000 163 2 version: a 15 electrical specifications ( t a = 25 c unless otherwise noted ) parameter conditions symbol m in t yp m ax u nit static (note 4 ) drain - source breakdown voltage v gs = 0 v, i d = 250 a bv dss 3 0 -- -- v gate threshold voltage v ds = v gs , i d = 250ua v gs(th) 1. 2 1.6 2. 5 v gate body leakage v gs = 2 0v, v ds = 0v i gss -- -- 100 na zero gate voltage drain current v ds = 3 0v, v gs = 0v i dss -- -- 1 gs = 10v, i d = 24 a r ds(on) -- 2.9 3.8 m gs = 4.5 v, i d = 1 2 a -- 4.3 5.5 dynamic (note 5 ) total gate charge v ds = 15v, i d = 24 a, v gs = 4.5v q g -- 24 -- nc gate - source charge q gs -- 4.2 -- gate - drain charge q gd -- 13 -- input capacitance v ds = 15 v, v gs = 0v, f = 1.0mhz c iss -- 2200 -- pf output capacitance c oss -- 280 -- reverse transfer capacitance c rss -- 177 -- switching (note 6 ) turn - on delay time v gs = 10 v, v d s = 15v, r g = 3.3 d = 15a t d(on) -- 12.6 -- ns turn - on rise time t r -- 19.5 -- turn - off delay time t d(off) -- 42.8 -- turn - off fall time t f -- 13.2 -- source - drain diode (note 4 ) diode forward voltage v gs =0v, i s =10a v sd -- -- 1 v notes: 1. current limited by package 2. pulse width limited by the m aximum junction tem perature 3. l = 0. 1 mh, i as = 50 a, v dd = 50 v, r g = 25 , start ing t j = 25 o c 4. p ulse test: pw 300s, d u ty cycle 2% 5. for design aid only, not subject to production testing. 6. switching time is essentially independent of operating temperature.
ts m 0 38 n 03 tai wan semiconductor document number: d s_p0000 163 3 version: a 15 ordering information part no. package packing tsm 038n 03pq33 rgg pdfn33 5 ,000 pcs / 13 reel note: 1. compliant to rohs directive 2011/65/eu and in accordance to weee 2002/96/ec 2. halogen - free according to iec 61249 - 2 - 21 definition
ts m 0 38 n 03 tai wan semiconductor document number: d s_p0000 163 4 version: a 15 characteristics curves ( t c = 25c unless otherwise not ed) continuous drain current vs. t c gate charge on - resistance vs. junction temperature threshold voltage vs. junction temperature maximum safe operating area (to - 220) normalized thermal transient impedance curve v gs , gate to source voltage (v) qg, gate charge ( nc ) i d , continuous drain current (a) t c , case temperature ( c ) normalized on resistance (m ? ) t j , junction temperature ( c ) normalized gate threshold voltage (v) t j , junction temperature ( c ) i d , continuous drain current (a) v ds , drain to source voltage (v) normalized thermal response (r jc ) square wave puls e duration (s)
ts m 0 38 n 03 tai wan semiconductor document number: d s_p0000 163 5 version: a 15 package outline dimensions ( unit: millimeters) pdfn33 suggested pad layout ( unit: millimeters) marking diagram y = year code m = month code for halogen free product o =jan p =feb q =mar r =apr ` s =may t =jun u =jul v =aug w =sep x =oc t y =nov z =dec l = lot code (1~9, a~z)
ts m 0 38 n 03 tai wan semiconductor document number: d s_p0000 163 6 version: a 15 notice specifications of the products displayed herein are subject to change without notice. tsc or anyone on its behalf, assumes no responsibility or liabilit y for any errors or inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied, to any intellectual property rights is granted by this document. except as provided in tscs terms and condit ions of sale for such products, tsc assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of tsc products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. the products shown herein are not designed for use in medical, life - saving, or life - sustaining applications. customers using or selling these products for use in such applica tions do so at their own risk and agree to fully indemnify tsc for any damages resulting from such improper use or sale.
|
