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  september 2013 doc id 17243 rev 2 1/20 1 l4938ed L4938EPd advanced voltage regulator features enable and sense inputs (en, si) protected against negative transients down to -5 v reset threshold adjustable from 3.8 v to 4.7 v extremely low quiescent current, 65 a (less than 90 a) in standby mode operating dc supply voltage range 5 v - 28 v operating transient supply voltage up to 40 v high precision standby output voltage 5 v 1% with 100 ma current capability output 2 voltage 5 v 2% with 400 ma current capability (adj wired to v out2 ) output 2 voltage adjustable by external voltage divider output 2 disable function for standby mode description the l4938ed and L4938EPd are monolithic integrated dual voltage regulators with two very low dropout outputs and additional functions such as power-on reset and input voltage sense. they are designed for supplying microcomputer controlled systems especially in automotive applications. table 1. device summary package order codes tube tape and reel so-20 l4938ed l4938ed013tr powerso-20 L4938EPd L4938EPd13tr powerso-20 so-20 www.st.com
contents l4938ed, L4938EPd 2/20 doc id 17243 rev 2 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.2 standby regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.3 output 2 voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.4 reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.5 sense comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.6 thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.7 transient sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.8 input protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 so-20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 powerso-20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
l4938ed, L4938EPd list of tables doc id 17243 rev 2 3/20 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. out1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. out2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 7. out1, out2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. enable input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 9. reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 10. sense comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 11. so-20 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 12. powerso-20 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 13. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
list of figures l4938ed, L4938EPd 4/20 doc id 17243 rev 2 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 4. out2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. reset generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 6. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. input protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. input characteristics of si, en . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. so-20 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 10. powerso-20 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
l4938ed, L4938EPd block diagram and pin description doc id 17243 rev 2 5/20 1 block diagram and pin description figure 1. block diagram figure 2. configuration diagram (top view) 1 19 20 10 9 8 7 6 5 4 3 2 14 15 16 18 17 13 12 11 gnd gnd gnd n.c. n.c. n.c. gnd n.c. n.c. out2 adj out1 so reset v s2 v s1 si pr ct en powerso-20 1 19 20 10 9 8 7 6 5 4 3 2 14 15 16 18 17 13 12 11 gnd gnd n.c. out2 adj out1 so res v s2 v s1 si pr ct en gnd gnd gnd gnd gnd gnd so-20
block diagram and pin description l4938ed, L4938EPd 6/20 doc id 17243 rev 2 table 2. pin definitions and functions pin number name function so-20 powerso-20 18 3 v s2 supply voltage (400 ma regulator) 19 4 v s1 supply voltage (100 ma regulator, reset, sense) 20 5 si sense input 1 6 pr reset threshold programming 2 7 ct reset delay capacitor 3 8 en enable (low activates the 400 ma regulator) 4, 5, 6, 7, 14, 15, 16, 17 1, 10, 11, 20 gnd ground 8 14 res reset output 9 15 so sense output 10 16 out1 100 ma regulator output 11 17 adj feedback of 400 ma regulator 12 18 out2 400 ma regulator output 13 2, 9, 19 nc not connected
l4938ed, L4938EPd electrical specifications doc id 17243 rev 2 7/20 2 electrical specifications 2.1 absolute maximum ratings stressing the device above the ratings listed in the ?absolute maximum ratings? tables may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to the conditions in this section for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. note: the circuit is esd protected according to mil-std-883c. table 3. absolute maximum ratings symbol parameter value unit v indc dc operating supply voltage 28 v v intr transient operating supply voltage (t < 400 ms) -14 to 40 v i o output current internally limited v si sense input voltage (voltage forced) (1) 1. current forced means voltage unlimited but current limited to the specified value voltage forced means voltage limited to the specified values while the current is not limited -20 to 20 v i si sense input current (current forced) (1) 1 ma v en enable input voltage (voltage forced) (1) -20 to 20 v i en sense input current (current forced) (1) 1 ma v res , v so output voltages -0.3 to 20 v i res , i so output currents (output low) 5 ma p o power dissipation at t amb =80c (2) 2. typical value soldered on a pc board with 8 cm 2 copper ground plane (35 mm thick). 875 mw t stg storage temperature -65 to 150 c t j operating junction temperature -40 to 150 c t jsd thermal shutdown junction temperature output 2 will shutdown typically at t j 10 k lower than output 1 165 c
electrical specifications l4938ed, L4938EPd 8/20 doc id 17243 rev 2 2.2 thermal data note: typical value soldered on a pc board with 8 cm 2 copper ground plane (35 mm thick). 2.3 electrical characteristics v s = 14 v; t j = -40 to 150 c, unless otherwise specified. table 4. thermal data symbol parameter so -20 powerso-20 unit r thj-amb thermal resistance junction to ambient 50 - c/w r thj-case thermal resistance junction to case - < 2 c/w table 5. out1 symbol parameter test condition min. typ. max. unit v o1 supply output voltage v s = 6 to 28 v; i o1 = 400 a to 100 ma 4.9 5 5.1 v t j 125c; i o1 = 50 to 400 a 4.8 5 5.2 v v dp1 drop output voltage 1 i out1 = 10 ma 0.1 0.2 v i out1 = 100 ma; v s = 4.8 v 0.2 0.4 v v ol01 load regulation 1 i out1 = 1 to 100 ma (after regulation setting) 25 mv v lim1 current limit 1 v out1 = 0.8 to 4.5 v 100 200 400 ma i qsb quiescent current in standby mode i en 2.4 v (output 2 disabled) i o1 = 0.1 ma; v si > 1.3 v 65 90 a t j <85c; r pr = 0 75 a table 6. out2 symbol parameter test condition min. typ. max. unit v o2 output voltage 2 adj connected to out2 enable = low; v s = 6 to 28 v; i o2 = 5 to 400 ma 4.9 5.1 v v dp2 drop output voltage 2 i out2 = 100 ma 0.2 0.3 v i out2 = 400 ma; v s = 4.8 v 0.3 0.6 v v ol02 load regulation 2 i out1 = 5 to 400 ma (after regulation setting) 50 mv r adj adjust input resistance 60 100 150 ma i lim2 current limit 2 v 02 = 0.8 to 4.5 v 450 650 1300 ma i q quiescent current i out1 = 100 ma; i out2 = 400 ma 20 ma
l4938ed, L4938EPd electrical specifications doc id 17243 rev 2 9/20 table 7. out1, out2 symbol parameter test condition min. typ. max. unit v oli 1,2 line regulation v s = 6 to 28 v; i o1 = 1 ma, i o2 = 5 ma, (after regulation setting) 20 mv table 8. enable input symbol parameter test condition min. typ. max. unit v enl enable input low voltage (output 2 active) -20 1 v v enh enable input high voltage 1.4 20 v v enhyst enable hysteresis 20 30 60 mv i en low enable input current low v en = 0 -20 -8 -3 a i en high enable input current high v en = 1.1 to 7 v; t j < 130 c; -1 0 1 a v en = 1.1 to 7 v; t j = 130 to 150 c; -10 0 10 a table 9. reset circuit symbol parameter test condition min. typ. max. unit v rt reset threshold voltage (1) 1. the reset threshold can be programmed continuously from typ 3.8 v to 4.7 v by changing a value of an external resistor from pin pr to gnd. r pr = 4.5 v o1 - 0.3 v o1 - 0.2 v r pr = 0 3.65 3.8 3.95 v v rth reset threshold hysteresis r pr = 30 60 120 mv t rd min reset pulse delay c res = 47 nf; t r 30 s (2) 2. this is a minimum reset time according to the hyst eresis of the comparator. delay time starts with v out1 exceeding v rt . 40 60 100 ms t rd nom reset pulse delay c res = 47 nf (3) 3. this is the nominal reset time depending on the discharging limit of c t (saturation voltage) and the upper threshold of the timer comparator. delay time starts with v out1 exceeding v rt . 60 100 140 ms t rr reset reaction time c res = 47 nf 10 50 150 s i ct pull down capability of the discharge circuit v out1 < v rt 3 6 15 ma i ct charge current v out1 > v rt -1.3 -1 0.7 a v resl reset output low voltage r res = 10 k to v out1 v out1 1.5 v 0.4 v v resh reset output high leakage current v res = 5 v 1 a
electrical specifications l4938ed, L4938EPd 10/20 doc id 17243 rev 2 table 10. sense comparator symbol parameter test condition min. typ. max. unit v si functional range -20 20 v v sit sense threshold voltage falling edge; t j < 130 c 1.08 1.16 1.24 v falling edge; t j < 130 to 150 c 1.05 1.16 1.29 v v sith sense threshold hysteresis 10 30 60 mv v sol sense output low voltage v si 1.05 v; r so =10k connected to 5 v; v s 5v 0.4 v i soh sense output leakage v so = 5 v; v si 1.5 v 1 a i si high sense input current high v si = 1.1 to 7 v; t j < 130 c -1 0 1 a v si = 1.1 to 7 v; t j < 130 to 150 c -10 0 10 a i si low sense input current low v si = 0 v -20 -8 -3 a
l4938ed, L4938EPd application information doc id 17243 rev 2 11/20 3 application information figure 3. application diagram 1. the leakage of c t must be less than 0.5 ma (2 v). if an external resistor between c t and v out1 is applied, the leakage current may be increased. the exte rnal resistor should have more than 30 k . for stability: cs 1 f, c01 10 f, c02 10 f, esr 5 (designed target). 2. for transients exceeding 20 v or -20 v external protection is required at the pins si and en as shown at pin en. the protection proposed provides proper function for transients in the range of 200 v. if the zener diode is omitted the external resistor should be raised to 200 k to limit the current to 1 ma. without the zener diode, the function 20 v or -20 v can not be guaranteed. 3.1 functional description the l4938ed and L4938EPd are monolithic integrated dual voltage regulators, based on the stm modulator voltage regulator approach. several outstanding features and auxiliary functions are implemented to meet the requirements of supplying microprocessor systems in automotive applications. nevertheless, it is suitable also in other applications where two stabilized voltages are required. the modular approach of this device allows to get easy also other features and functions when required. 3.2 standby regulator the standby regulator uses an isolated collector vertical pnp transistor as a regulating element. with this structure very low dropout voltage at currents up to 100 ma is obtained. the dropout operation of the standby regulator is maintained down to 3 v input supply voltage. the output voltage is regulated up to the transient input supply voltage of 40 v. with this feature no functional interruption due to overvoltage pulses is generated. (see note 1) (see note 2)
application information l4938ed, L4938EPd 12/20 doc id 17243 rev 2 in the standby mode when the output 2 is disabled, the current consumption of the device (quiescent current) is less than 90 a (14 v supply voltage). to reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled. a second regulation path keeps the output voltage without load below 5.5 v even at high temperatures. 3.3 output 2 voltage the output 2 regulator uses the same output structure as the standby regulator but rated for the output current of 400 ma. the output voltage is internally fixed to 5 v if adj is connected to v out2 . the output 2 regulator can be switches off via the enable input. figure 4. out2 connecting a resistor divider r 1e , r 2e to the adj, out2 pin the output voltage 2 can be programmed to the value of with r adj = 60 k to 150 k and v out1 = 4.95 to 5.05 v. for an exact calculation the temperature coefficient (t c - 2000 pprm) of the internal resistor (r adj ) must be taken into account. pin adj in this mode should not have a capacitive burden because this would reduce the phase margin of the regulator loop. 3.4 reset circuit the reset circuit supervises the standby output voltage. the reset output (res) is defined from v out 1 v. even if v s is lacking, the reset generator is supplied by the output voltage v out1 . the reset threshold of 4.7 v is defined with the internal reference voltage (a) and standby output divider, when pin pr is left open. the reset threshold voltage can be programmed in the range from 3.8 v to 4.7 v by connecting an external resistor from pin pr to gnd. v out2 v out1 1 r 1e r 2e r adj + () r 2e r adj ? ------------------------------------------------ - + ?? ?? ?? =
l4938ed, L4938EPd application information doc id 17243 rev 2 13/20 the value of the programming resistor r pr can be calculated with: the reset pulse delay time t rd , is defined with the charge time of an external capacitor c t : the reaction time of the reset circuit originates from the noise immunity. standby output voltage drops below the reset threshold only a bit longer than the reaction time results in a shorter reset delay time. the nominal reset delay time is generated for standby output voltage drops longer than approximately 50 s. the minimum reset time is generated if reset condition only occurs for a short time triggering a reset pulse but not completely discharging c t . the reset can be related to output2 on request. if higher charge currents for the reset capacitor are required a resistors from pin c t to out1, may be used to increase the current. we recommended the use of 10 k to 5 v as an output pull up. 3.5 sense comparator the sense comparator compares an input signal with an internal voltage reference of typical 1.23 v. the use of an external voltage divider makes this comparator very flexible in the application. it can be used to supervise the input voltage either before or after the protection diode and to give additional information to the microprocessor like low voltage warnings. we recommended the use of 10 k to 5 v as an output pull up. 3.6 thermal protection both outputs are provided with an overtemperature shutdown regulation power dissipation down to uncritical values. output 2 shuts down approximately 10 k before output 1. under normal conditions shutdown of output 2 allows the chip to cool down again. thus output 1 is unaffected. the thermal shutdown reduces the output voltages until power dissipation and the flow of thermal energy out of the chip balance. 3.7 transient sensitivity in proper operation (v out > 4.5 v) the reference is supplied by v out1 thus reducing sensitivity to input transients. a. the reference is alternatively supplied from v s or v out1 . if one supply is present, the reference is operating. r pr 22k 4.7k v rt ------------ 1 ? --------------------- - 92.9k ? = 3.8v v rt 4.7v ? ? 1 a ------------------------ = t rdnom c t 1.4v ? 1 a ------------------------ =
application information l4938ed, L4938EPd 14/20 doc id 17243 rev 2 figure 5. reset generator figure 6. waveforms
l4938ed, L4938EPd application information doc id 17243 rev 2 15/20 3.8 input protection the inputs enable (en) and sense in (si) are protected against negative transients. figure 7 is showing the simplified schematic figure 7. input protection figure 8. input characteristics of si, en
package and packing information l4938ed, L4938EPd 16/20 doc id 17243 rev 2 4 package and packing information 4.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 4.2 so-20 package information table 11. so-20 mechanical data dim. mm min. typ. max. a 2.35 2.65 a1 0.1 0.3 b 0.33 0.51 c 0.23 0.32 d 12.6 13 e 7.4 7.6 e 1.27 h 10 10.65 h 0.25 0.75 l 0.4 1.27 k 0 8
l4938ed, L4938EPd package and packing information doc id 17243 rev 2 17/20 figure 9. so-20 package dimensions 4.3 powerso-20 package information table 12. powerso-20 mechanical data dim. mm min. typ. max. a 3.6 a1 0.1 0.3 a2 3.3 a3 0 0.1 b 0.4 0.53 c 0.23 0.32 d (1) 15.8 16 d1 9.4 9.8 e 13.9 14.5 e 1.27 e3 11.43 e1 (1) 10.9 11.1 e2 2.9 e3 5.8 6.2
package and packing information l4938ed, L4938EPd 18/20 doc id 17243 rev 2 figure 10. powerso-20 package dimensions g 0 0.1 h 15.5 15.9 h 1.1 l 0.8 1.1 n 10 s 8 t 10 1. "d and f" do not include mold flash or protrusions. - mold flash or protrusions shall not exceed 0.15 mm (0.006"). - critical dimensions : "e", "g" and "a3" table 12. powerso-20 mechanical data (continued) dim. mm min. typ. max. e a2 a e a1 pso20mec detail a t d 110 11 20 e1 e2 h x 45? detail a lead slug a3 s gage plane 0.35 l detail b r detail b (coplanarity) gc - c - seating plane e3 b c n n h bottom view e3 d1 0056635 i
l4938ed, L4938EPd revision history doc id 17243 rev 2 19/20 5 revision history table 13. document revision history date revision changes 10-mar-2010 1 initial release. 20-sep-2013 2 updated disclaimer.
l4938ed, L4938EPd 20/20 doc id 17243 rev 2 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com


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