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| specification subject to change without notice, as is and for reference only. for purchasing, please contact sales representatives. IT8206R jumper free over clock controller preliminary specification 0.1 integrated technology express, inc. http://www..net/ datasheet pdf - http://www..net/
http://www..net/ datasheet pdf - http://www..net/ copyright ? 2003 ite, inc. this is preliminary document release. all specifications are subject to change without notice. the material contained in this document supersedes all previous documentation issued for the related products included herein. please contact ite, inc. for the latest document(s). all sales are subject to ite?s standard terms and conditions, a copy of which is included in the back of this document. ite, IT8206R is a trademark of ite, inc. all other trademarks are claimed by their respective owners. all specifications are subject to change without notice. additional copies of this manual or other ite literature may be obtained from: ite, inc. phone: (02) 29126889 marketing department fax: (02) 2910-2551, 2910-2552 8f, no. 233-1, bao chiao rd., hsin tien, taipei county 231, taiwan, r.o.c. ite (usa) inc. phone: (408) 530-8860 marketing department fax: (408) 530-8861 1235 midas way sunnyvale, ca 94086 u.s.a. ite (usa) inc. phone: (512) 388-7880 eastern u.s.a. sales office fax: (512) 388-3108 896 summit st., #105 round rock, tx 78664 u.s.a. if you have any marketing or sales questions, please contact: lawrence liu, at ite taiwan: e-mail: lawrence.liu@ite.com.tw , tel: 886-2-29126889 x6071, fax: 886-2-29102551 david lin , at ite u.s.a: e-mail: david.lin@iteusa.com , tel: (408) 530-8860 x238, fax: (408) 530-8861 don gardenhire , at ite eastern usa office: e-mail: don.gardenhire@iteusa.com , tel: (512) 388-7880, fax: (512) 388-3108 to find out more about ite, visit our world wide web at: http://www.iteusa.com http://www.ite.com.tw or e-mail itesupport@ite.com.tw for more product information/services. http://www..net/ datasheet pdf - http://www..net/ http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 i contents contents 1. features ....................................................................................................................... ............................1 2. general description ............................................................................................................ ......................3 3. block diagram .................................................................................................................. ........................5 4. pin configuration .............................................................................................................. ........................7 5. it8206 pin descriptions........................................................................................................ ....................9 6. register description ........................................................................................................... ....................11 6.1 register description ........................................................................................................... ..........11 6.1.1 vid output control register (vfocr) ? offset 0x00 ......................................................12 6.1.2 vid programmed ouput register (vidpor)? offset 0x02 ..............................................12 6.1.3 vid ouput register (vidor)? offset 0x03......................................................................12 6.1.4 vid input register (vidir)? offset 0x04 .........................................................................13 6.1.5 gpioa control register (gpioacr)? offset 0x10..........................................................13 6.1.6 gpio b control register (gpiobcr)? offset 0x11.........................................................13 6.1.7 gpio a data register (gpioadr)? offset 0x12.............................................................14 6.1.8 gpio b data register (gpiobdr)? offset 0x13.............................................................14 6.1.9 gpio a output type register (gpioaotr)? offset 0x14 ..............................................15 6.1.10 gpio b output type register (gpiobotr)? offset 0x15 ..............................................15 6.1.11 gpio a pull-up resister control register (gpioapur)? offset 0x16.............................16 6.1.12 gpio b pull-up resister control register (gpiobpur)? offset 0x17.............................16 6.1.13 gpio a pull-down resister control register (gpioapdr)? offset 0x18 ........................17 6.1.14 gpio b pull-down resister control register (gpiobpdr)? offset 0x19 ........................17 6.1.15 gpio a and b synchnorze control register (gpiosynr)? offset 0x1a.........................17 6.1.16 watch-dog timer register (wdtr)? offset 0x20 ...........................................................18 6.1.17 watch-dog timer unit register (wdtur)? offset 0x21..................................................18 6.1.18 watch-dog timer control register (wdtcsr)? offset 0x22 ..........................................18 7. dc characteristics............................................................................................................. .....................19 8. ac characteristics............................................................................................................. .....................21 9. package information............................................................................................................ ...................23 10. ordering information........................................................................................................... ....................25 figures figure 8-1. serial bus waveform................................................................................................ ..................21 tables table 4-1. pins listed in numeric order ........................................................................................ .................8 table 4-2. pins listed in alphabetical order ................................................................................... ................8 table 5-1. pin descriptions of vid interface ................................................................................... ................9 table 5-2. pin descriptions of general purpose i/o............................................................................. ...........9 table 5-3. pin descriptions of sm bus interface................................................................................ .............9 table 5-4. pin description of watch-dog reset.................................................................................. ............9 table 5-5. pin description of cpu changing detection ........................................................................... .......9 table 6-1. list of over clock registers ........................................................................................ ................11 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 ii i t 82 0 6 r table 8-1. serial bus ac table ................................................................................................. ...................21 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 itpm-pn-200315 specifications subject to change without notice by claire yao, 4/28/2003 1 features 1. features six vid input (vidin0~5) and six vid output (vidout0~vidout5) pins 8 gpio pins supports auto-recovery; build-in watch-dog timer and reset output signal pin provides cpu changing detect pin (slotocc#) serial bus interface 28-pin ssop http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 2 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 3 general description 2. general description for acquiring better performance with lower cost, "over-clocking" gradually become a popular feature in the diy market of pc motherboard. to do so, many interfaces such as pwm, cpu, chipset, clock generator, agp, dimm...etc on motherboard should be well handled. moreover, there is a trend to do "jumperless" over-clocking in the motherboard design. for matching the trend, ite develops a series of jumper free over clock controllers targeted on different environments. generally, these controllers cover the following features... - vid interface and/or fid interface handling - gpio - watch dog timers with reset signals for system auto-recovery from different situations - cpu changing detection http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 4 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 5 block diagram 3. block diagram ! " !# $ !# % ! !% http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 6 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 7 pin configuration 4. pin configuration http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 8 i t 82 0 6 r table 4-1. pins listed in numeric order pin signal pin signal pin signal pin signal 1 3vsb 8 vidin4 15 rstout# 22 vidout2 2 gpio4 9 vidin5 16 gnd 23 vidout1 3 gpio3 10 gpio0 17 slotocc# 24 vidout0 4 vidin0 11 gpio1 18 vbat 25 gpio7 5 vidin1 12 gpio2 19 vidout5 26 gpio6 6 vidin2 13 sda 20 vidout4 27 gpio5 7 vidin3 14 scl 21 vidout3 28 asel table 4-2. pins listed in alphabetical order pin signal pin signal pin signal pin signal 1 3vsb 3 gpio3 17 slotocc# 9 vidin5 28 asel 4 gpio5 18 vbat 24 vidout0 16 gnd 27 gpio6 4 vidin0 23 vidout1 10 gpio0 26 gpio7 5 vidin1 22 vidout2 11 gpio1 15 rstout# 6 vidin2 21 vidout3 12 gpio2 14 scl 7 vidin3 20 vidout4 2 gpio4 13 sda 8 vidin4 19 vidout5 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 9 it8206 pin descriptions 5. it8206 pin descriptions table 5-1. pin descriptions of vid interface pin(s) no. symbol attribute description 4-9 vidin0~ vidin5 i voltage identification input signals from cpu 19-24 vidout5~ vidout0 od12 voltage identification output signals to pwm table 5-2. pin descriptions of general purpose i/o pin(s) no. symbol attribute description 10-12, 3, 2, 27, 26, 25 gpio0~ gpio7 io12 general purpose i/o pins table 5-3. pin descriptions of sm bus interface pin(s) no. symbol attribute description 13 sda iod12 smb data signal 14 scl ik smb clock signal 28 asel od12 address selector 0: 7?h37 1: 7?h4e table 5-4. pin description of watch-dog reset pin(s) no. symbol attribute description 24 rstout# od12 watch-dog timeout reset output signal table 5-5. pin description of cpu changing detection pin(s) no. symbol attribute description 17 slotocc# ik cpu changing detect pin 0: cpu present 1: cpu absent table 5-6. pin description of power/ground pin(s) no. symbol attribute description 1 3vsb i power supply of 3.3v 18 vbat i battery power supply of 3.3v 16 gnd i ground notes: io cell types are described below: i: input pad. ik: schmitt trigger input pad. io12: input/output pad, output driving is 12 ma iod12: input/open-drain output pad, output driving is 12 ma o12: 12ma output pad od12: 12ma open-drain output pad http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 10 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 11 register description 6. register description 6.1 register description table 6-1. list of over clock registers register name r/w address default vid output control register (vfocr) r/w 0x00 8?h00 vid programmed output register (vidpor) r/w 0x02 8?h00 vid output register (vidor) ro 0x03 8?h00 vid input register (vidir) ro 0x04 8?h00 gpio a control register (gpioacr) r/w 0x10 8?h00 gpio b control register (gpiobcr) r/w 0x11 8?h00 gpio a data register (gpioadr) r/w 0x12 8?hff gpio b data register (gpiobdr) r/w 0x13 8?h0f gpio a output type register (gpioaotr) r/w 0x14 8?h00 gpio b output type register (gpiobotr) r/w 0x15 8?h00 gpio a pull-up resister control register (gpioapur) r/w 0x16 8?h00 gpio b pull-up resister control register (gpiobpur) r/w 0x17 8?h00 gpio a pull-down resister control register (gpioapdr) r/w 0x18 8?h00 gpio b pull-down resister control register (gpiobpdr) r/w 0x19 8?h00 gpio a and b synchronize control register (gpiosynr) r/w 0x1a 8?h00 watch-dog timer register (wdtr) r/w 0x20 8?h00 watch-dog timer unit register (wdtur) r/w 0x21 8?h00 watch-dog timer control register (wdtcr) r/w 0x22 8?h00 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 12 i t 82 0 6 r 6.1.1 vid output control register (vfocr) ? offset 0x00 bit r/w default description 7-5 - 0h reserved 4 r/w 0h dynamic vid enable bit 0: when this bit is set to ?0?, the value of output pins vidout[5:0] is the same as the value of vidpor register. 1: when this bit is set to ?1?, the value of vidout output pins is generated from the input signals vidin[5:0] and vidpor register. this bit is active when bit 1 (vidoe) is set to 1. 3 wo 0h clear new cpu status (clrcpu) write ?1? to this bit to clear new cpu status bit. to release the clear action, this bit should be written to ?0? after being written to ?1?. this bit is always read as ?0?. 2 r/w 0h new cpu status (ncpu) 0: cpu is not replaced. 1: cpu is replaced. 1 r/w 0h vid output enable (vidoe) 0: viddin 5~vidin0 pins pass to vidout5~vidout0 pins. 1: vidout5~vidout0 pins are controlled by vidpor[5:0]. 0 r/w 0h reserved 6.1.2 vid programmed ouput register (vidpor)? offset 0x02 bit r/w default description 7-6 ro 0h reserved 5-0 r/w 0h vid programmed output data (vidpor[5:0]) the value is valid when vidoe bit is ?1?. the sum of vidpod and vidin is output to vidout5~vidout0 output pins. 6.1.3 vid ouput register (vidor)? offset 0x03 bit r/w default description 7-6 ro 0h reserved 5-0 ro 0h vid output data (fidor[5:0]) these bits store the value of vidout5~vidout0. http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 13 register description 6.1.4 vid input register (vidir)? offset 0x04 bit r/w default description 7-6 ro 0h reserved 5-0 ro 0h vid input data (vidid[5:0]) these bits reflect the value of vidin5~vidin0. 6.1.5 gpioa control register (gpioacr)? offset 0x10 bit r/w default description 7 r/w 0h reserved this bit must be set to zero. 6 r/w 0h gpio 5 input enable 0: gpio 5 is an output pin. 1: gpio 5 is an input pin. 5 r/w 0h gpio 4 input enable 0: gpio 4 is an output pin. 1: gpio 4 is an input pin. 4 r/w 0h gpio 3 input enable 0: gpio 3 is an output pin. 1: gpio 3 is an input pin. 3 r/w 0h reserved this bit must be set to zero. 2 r/w 0h gpio 2 input enable 0: gpio 2 is an output pin 1: gpio 2 is an input pin 1 r/w 0h gpio 1 input enable 0: gpio 1 is an output pin. 1: gpio 1 is an input pin. 0 r/w 0h gpio 0 input enable 0: gpio 0 is an output pin. 1: gpio 0 is an input pin. 6.1.6 gpio b control register (gpiobcr)? offset 0x11 bit r/w default description 7-4 ro 0h reserved 3-2 r/w 0h reserved these bits must be set to zero 1 r/w 0h gpio 7 input enable 0: gpio 7 is an output pin. 1: gpio 7 is an input pin. 0 r/w 0h gpio 6 input enable 0: gpio 6 is an output pin. 1: gpio 6 is an input pin. http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 14 i t 82 0 6 r 6.1.7 gpio a data register (gpioadr)? offset 0x12 bit r/w default description 7 r/w 1h reserved this bit must be set to one. 6 r/w 1h gpio 5 data bit if gpio 5 is an input pin, this bit will be the input value from gpio 5. if gpio 5 is an output pin, this bit will be the value output to gpio 5. 5 r/w 1h gpio 4 data bit if gpio 4 is an input pin, this bit will be the input value from gpio 4. if gpio 4 is an output pin, this bit will be the value output to gpio 4. 4 r/w 1h gpio 3 data bit if gpio 3 is an input pin, this bit will be the input value from gpio 3. if gpio 3 is an output pin, this bit will be the value output to gpio 3. 3 r/w 1h reserved this bit must be set to one. 2 r/w 1h gpio 2 data bit if gpio 2 is an input pin, this bit will be the input value from gpio 3. if gpio 2 is an output pin, this bit will be the value output to gpio 3. 1 r/w 1h gpio 1 data bit if gpio 1 is an input pin, this bit will be the input value from gpio 2, if gpio 1 is an output pin, this bit will be the value output to gpio 2 0 r/w 1h gpio 0data bit if gpio 0 is an input pin, this bit will be the input value from gpio 1. if gpio 0 is an output pin, this bit will be the value output to gpio 1. 6.1.8 gpio b data register (gpiobdr)? offset 0x13 bit r/w default description 7-4 ro 0h reserved 3-2 r/w 1h reserved these bits must be set to one. 1 r/w 1h gpio 7 data bit if gpio 7 is an input pin, this bit will be the input value from gpio 7. if gpio 7 is an output pin, this bit will be the value output to gpio 7. 0 r/w 1h gpio 6 data bit if gpio 6 is an input pin, this bit will be the input value from gpio 6. if gpio 6 is an output pin, this bit will be the value output to gpio 6. http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 15 register description 6.1.9 gpio a output type register (gpioaotr)? offset 0x14 bit r/w default description 7 r/w 0h reserved this bit must be set to zero. 6 r/w 0h gpio 5 output type 0: gpio 5 is an open-drain output pin. 1: gpio 5 is a push-pull output pin. 5 r/w 0h gpio 4 output type 0: gpio 4 is an open-drain output pin. 1: gpio 4 is a push-pull output pin. 4 r/w 0h gpio 3 output type 0: gpio 3 is an open-drain output pin. 1: gpio 3 is a push-pull output pin. 3 r/w 0h reserved this bit must be set to zero. 2 r/w 0h gpio 2 output type 0: gpio 2 is an open-drain output pin. 1: gpio 2 is a push-pull output pin. 1 r/w 0h gpio 1 output type 0: gpio 1 is an open-drain output pin. 1: gpio 1 is a push-pull output pin. 0 r/w 0h gpio 0 output type 0: gpio 0 is an open-drain output pin. 1: gpio 0 is a push-pull output pin. 6.1.10 gpio b output type register (gpiobotr)? offset 0x15 bit r/w default description 7-4 ro 0h reserved 3-2 r/w 0h reserved this bit must be set to zero. 1 r/w 0h gpio 7 output type 0: gpio 7 is an open-drain output pin. 1: gpio 7 is a push-pull output pin. 0 r/w 0h gpio 6 output type 0: gpio 6 is an open-drain output pin. 1: gpio 6 is a push-pull output pin. http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 16 i t 82 0 6 r 6.1.11 gpio a pull-up resister control register (gpioapur)? offset 0x16 bit r/w default description 7 r/w 0h reserved this bit must be set to zero. 6 r/w 0h gpio 5 pull-up resister enable 0: disable gpio5 pull-up resister. 1: enable gpio5 pull-up resister. 5 r/w 0h gpio 4 pull-up resister enable 0: disable gpio4 pull-up resister. 1: enable gpio4 pull-up resister. 4 r/w 0h gpio 3 pull-up resister enable 0: disable gpio3 pull-up resister. 1: enable gpio3 pull-up resister. 3 r/w 0h reserved this bit must be set to zero. 2 r/w 0h gpio 2 pull-up resister enable 0: disable gpio2 pull-up resister. 1: enable gpio2 pull-up resister. 1 r/w 0h gpio 1 pull-up resister enable 0: disable gpio1 pull-up resister. 1: enable gpio1 pull-up resister. 0 r/w 0h gpio 0 pull-up resister enable 0: disable gpio0 pull-up resister. 1: enable gpio0 pull-up resister. 6.1.12 gpio b pull-up resister control register (gpiobpur)? offset 0x17 bit r/w default description 7-4 ro 0h reserved 3-2 r/w 0h reserved these bits must be set to zero. 1 r/w 0h gpio 7 pull-up resister enable 0: disable gpio 7 pull-up resister. 1: enable gpio 7 pull-up resister. 0 r/w 0h gpio 6 pull-up resister enable 0: disable gpio 6 pull-up resister. 1: enable gpio 6 pull-up resister. http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 17 register description 6.1.13 gpio a pull-down resister control register (gpioapdr)? offset 0x18 bit r/w default description 7 r/w 0h reserved this bit must be set to zero. 6 r/w 0h gpio 5 pull-down resister enable 0: disable gpio5 pull-down resister. 1: enable gpio5 pull-down resister. 5 r/w 0h gpio 4 pull-down resister enable 0: disable gpio4 pull-down resister. 1: enable gpio4 pull-down resister. 4 r/w 0h gpio 3 pull-down resister enable 0: disable gpio3 pull-down resister. 1: enable gpio3 pull-down resister. 3 r/w 0h reserved this bit must be set to zero. 2 r/w 0h gpio 2 pull-down resister enable 0: disable gpio2 pull-down resister. 1: enable gpio2 pull-down resister. 1 r/w 0h gpio 1 pull-down resister enable 0: disable gpio1 pull-down resister. 1: enable gpio1 pull-down resister. 0 r/w 0h gpio 0 pull-down resister enable 0: disable gpio0 pull-down resister. 1: enable gpio0 pull-down resister. 6.1.14 gpio b pull-down resister control register (gpiobpdr)? offset 0x19 bit r/w default description 7-4 ro 0h reserved 3-2 r/w 0h reserved these bits must be set to zero. 1 r/w 0h gpio 7 pull-down resister enable 0: disable gpio 7 pull-down resister. 1: enable gpio 7 pull-down resister. 0 r/w 0h gpio 6 pull-down resister enable 0: disable gpio 6 pull-down resister. 1: enable gpio 6 pull-down resister. 6.1.15 gpio a and b synchnorze control register (gpiosynr)? offset 0x1a bit r/w default description 7-2 ro 0h reserved 1 r/w 0h gpio 7-0 data out trigger if gpio 7~0 synchronize enable (bit 0), if this bit set to 1, the gpio7 ~0 data is output to pad. write 0 to reset this bit. 0 r/w 0h gpio 7~0 synchronize enable 0: disable gpio 7-0 synchronize output 1: enable gpio 7-0 synchronize output http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 18 i t 82 0 6 r 6.1.16 watch-dog timer register (wdtr)? offset 0x20 bit r/w default description 7-0 r/w 0h watch-dog timer read this register means how much time left that watch-dog will be timeout. 6.1.17 watch-dog timer unit register (wdtur)? offset 0x21 bit r/w default description 7-4 ro 0h reserved 3-2 r/w 0h watch-dog timer time-unit select 2?b00: 1 s 2?b01: 0.1 s 2?b10: 10 ms 2/b11: 1 ms 1-0 r/w 0h rstout# pulse width select 2?b00: 1 s 2?b01: 0.1 s 2?b10: 10 ms 2/b11: 1 ms 6.1.18 watch-dog timer control register (wdtcsr)? offset 0x22 bit r/w default description 7-2 ro 0h reserved 1 r/w 0h watch-dog time-out 0: no watch-dog timeout event 1: watch-dog timeout occurred. writing 1 can clear this bit. 0 r/w 0h watch-dog timer enable 0: disable watch-dog timer 1: enable watch-dog timer http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 19 dc characteristics 7. dc characteristics absolute maximum ratings power supply ( v cc ) -0.3v to 3.6v input voltage -0.3v to vcc + 0.3v output voltage -0.3v to vcc + 0.3v storage temperature -55 c to 150 c *comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to this device. these are stress ratings only. functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied, and exposure to absolute maximum rating conditions for extended periods may affect device reliability. dc electrical characteristics (operation condition vcc=3.0v~3.6v, tj=0 c~115 c) symbol parameter condition min. typ. max. unit v il input low voltage cmos - - 0.3*vcc v v ih input high voltage cmos 0.7*vcc - - v vt- schmitt trigger negative going threshold voltage cmos - 1.20 - v vt+ schmitt trigger positive going threshold voltage cmos - 2.10 - v v ol output low voltage i ol = -12ma - - 0.4 v v oh output high voltage i oh = -12ma 2.4 - - v r l input pull-up resistance v il =0v or v ih =vcc - 75 - k ? i il input leakage current no pull-up -1 - 1 ua i oz tri-state leakage current -1 - 1 ma c in input capacity - 10 - pf c out output capacity - 10 - pf c bid bi-directional buffer capacity - 10 - pf http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 20 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 21 a c characteristics 8. ac characteristics th th scl sda figure 8-1. serial bus waveform table 8-1. serial bus ac table symbol parameter min. typ. max. unit t h data hold time - 300 - ns http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 22 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 23 package information 9. package information ssop 28l outline dimensions unit: inches/mm 1 e h e e e e l l 1 c 14 see detail f detail f 15 28 a 1 1 1 1 a 2 2 2 2 a s d seating plane e b d y dimension in inches dimension in mm symbol min nom max min nom max a 0.053 0.064 0.069 1.35 1.63 1.75 a1 0.004 0.006 0.010 0.10 0.152 0.25 a2 0.059 1.50 b 0.008 0.010 0.012 0.203 0.254 0.305 c 0.007 0.010 0.178 0.250 d 0.386 0.390 0.394 9.80 9.91 10.00 e 0.150 0.154 0.157 3.80 3.91 4.00 e 0.025bsc 0.635bsc he 0.228 0.236 0.244 5.80 5.99 6.20 l 0.016 0.025 0.050 0.40 0.635 1.27 l1 0.041ref. 1.04ref. s 0.033ref. 0.838ref. y 0.004 0.10 0 8 0 8 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 24 http://www..net/ datasheet pdf - http://www..net/ www.ite.com.tw IT8206R v0.1 25 ordering information 10. ordering information part no. package IT8206R 28-ssop http://www..net/ datasheet pdf - http://www..net/ |
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