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FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin ?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 january 2013 FOD8160 high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin features optoplanar packaging technology allows more than 10 mm creepage and clearance distance, and 0.5 mm insulation distance to achieve reliable and high voltage insulation high noise immunity characterized by common-mode transient immunity (cmti) 20 kv/? minimum cmti specifications guaranteed over 3 v to 5.5 v supply voltage and -40? to 100? extended industrial temperature range high speed, 10 mbit/sec data rate (nrz) safety and regulatory approvals ul1577, 5,000 vac rms for 1 minute din-en/iec60747-5-5, 1,414 v peak working insulation voltage (pending approval) applications isolating intelligent power module isolating industrial communication interface related resources www.fairchildsemi.com/products/opto/ www.fairchildsemi.com/pf/fo/fodm8061.html www.fairchildsemi.com/pf/fo/fodm611.html description the FOD8160 is a 3.3 v / 5 v high-speed logic gate optocoupler with open collector output, which supports isolated communications to allow digital signals to communicate between systems without conducting ground loops or hazardous voltages. it utilizes fairchild? prioprietary optoplanar coplanar packaging technology and optimized ic design to achieve high noise immunity, characterized by high common-mode rejection specifications. the FOD8160, packaged in a wide-body sop 5-pin package, consists of an aluminium gallium arsenide (algaas) led and an integrated high-speed photodetector. the output of the detector ic is an open collector schottky-clamped transistor. the electrical and switching characteristics are guaranteed over the extended industrial temperature range of -40? to 100? and a v cc range of 3 v to 5.5 v. functional schematic 1 3 6 5 4 anode cathode gnd v o v cc
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 2 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin truth table pin definitions pin configuration led output off high on low pin # name description 1 anode anode 3 cathode cathode 4 gnd output ground 5v o output voltage 6v cc output supply voltage 1 3 6 5 4 anode cathode gnd v o v cc
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 3 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin safety and insulation ratings as per din en/iec60747-5-5 (pending approval), this optocoupler is suitable for ?afe electrical insulation?only within the safety limit data below. compliance with the safety ratings shall be ensured by means of protective circuits. symbol parameter min. typ. max. unit installation classi?ations per din vde 0110/1.89 table 1 for rated mains voltage < 150 vrms i?v for rated mains voltage < 300 vrms i?v for rated mains voltage < 450 vrms i?v for rated mains voltage < 600 vrms i?v climatic classi?ation 40/100/21 pollution degree (din vde 0110/1.89) 2 cti comparative tracking index 175 v pr input to output test voltage, method b, v iorm x 1.875 = v pr , 100% production test with t m = 1 s, partial discharge < 5 pc 2,651 v peak input to output test voltage, method a, v iorm x 1.5 = v pr , type and sample test with t m = 60 s, partial discharge < 5 pc 2,121 v peak v iorm maximum working insulation voltage 1,414 v peak v iotm highest allowable over voltage 8,000 v peak external creepage 10.0 mm external clearance 10.0 mm insulation thickness 0.5 mm safety limit values ?maximum values allowed in the event of a failure t s case temperature 150 ? i s,input input current 200 ma p s,output output power 600 mw r io insulation resistance at t s , v io = 500 v 10 9
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 4 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. t a = 25? unless otherwise speci?d. note: 1. no derating required up to 100?. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. note: 2. 0.1 ? bypass capacitor must be connected between pins 4 and 6 . symbol parameter value units t stg storage temperature -40 to +125 ? t opr operating temperature -40 to +100 ? t j junction temperature -40 to +125 ? t sol lead solder temperature (refer to re?w temperature pro?e on page 12) 260 for 10 sec ? input characteristics i f average forward input current 25 ma v r reverse input voltage 5.0 v pd i input power dissipation (1) 45 mw output characteristics v cc supply voltage 0 to 7.0 v v o output voltage -0.5 to v cc + 0.5 v i o average output current 50 ma pd o output power dissipation (1) 85 mw symbol parameter min. max. unit t a ambient operating temperature -40 +100 ? v cc supply voltages (2) 3.0 5.5 v v fl logic low input voltage 0 0.8 v i fl logic low input current 250 ? i fh logic high input current 6.0 15 ma n fan out (at r l = 1 k ) 5 ttl loads r l output pull-up resistor 330 4,000
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 5 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin isolation characteristics apply over all recommended conditions; typical value is measured at t a = 25?. notes: 3. device is considered a two-terminal device: pins 1 and 3 are shorted together and pins 4, 5, and 6 are shorted together. 4. 5,000 vac rms for 1-minute duration is equivalent to 6,000 vac rms for 1-second duration. electrical characteristics apply over all recommended conditions; t a = -40? to +100?, 3.0 v v cc 5.5 v; unless otherwise speci?d. typical value is measured at t a = 25? and v cc = 3.3 v or v cc = 5 v . symbol parameter conditions min. typ. max. units v iso input-output isolation voltage t a = 25?, r.h. < 50%, t = 1.0 min, i i-o 20 ? (3)(4) 5,000 vac rms r iso isolation resistance v i-o = 500 v (3) 10 11 c iso isolation capacitance v i-o = 0 v, frequency = 1.0 mhz (3) 1.0 pf symbol parameter conditions min. typ. max. units figure input characteristics v f forward voltage i f = 10 ma 1.05 1.45 1.80 v 1 (v f / t a ) temperature coef?ient of forward voltage -1.8 mv/? bv r input reverse breakdown voltage i r = 10 ? 5.0 v i fhl threshold input current v o = 0.6 v, i ol (sink) = 13 ma 2.5 6.0 ma 2 output characteristics v ol logic low output voltage i f = rated i fhl , i ol (sink) = 13 ma 0.4 0.6 v 3 i oh logic high output current i f = 250 ?, v o = 3.3 v 8.0 50.0 ? 4 i f = 250 ?, v o = 5.0 v 3.0 40.0 ? 4 i ccl logic low output supply current i f = 10 ma, v cc = 3.3 v 5.3 8.5 ma 5, 7 i f = 10 ma, v cc = 5.0 v 7.1 10.0 ma 5, 7 i cch logic high output supply current i f = 0 ma, v cc = 3.3 v 3.5 7.0 ma 6, 7 i f = 0 ma, v cc = 5.0 v 5.3 9.0 ma 6, 7
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 6 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin switching characteristics apply over all recommended conditions; t a = -40? to +100?, v cc = 3.3 v, i f = 6.0 ma; unless otherwise specified. typical value is measured at t a = 25? and v cc = 3.3 v. apply over all recommended conditions; t a = -40? to +100?, v cc = 5 v, i f = 6.0 ma; unless otherwise speci?d. typical value is measured at t a = 25? and v cc = 5 v. symbol parameter conditions min. typ. max. units figure data rate r l = 350 10 mbit/sec t phl propagation delay to logic low output r l = 350 , c l = 15 pf 40 80 ns 8, 9, 13 t plh propagation delay to logic high output r l = 350 , c l = 15 pf 50 90 ns 8, 9, 13 pwd pulse width distortion, | t phl ?t plh | r l = 350 , c l = 15 pf 10 35 ns 10, 11, 13 t psk propagation delay skew r l = 350 , c l = 15 pf (5) 40 ns t r output rise time (10% to 90%) r l = 350 , c l = 15 pf 20 ns 12, 13 t f output fall time (90% to 10%) r l = 350 , c l = 15 pf 10 ns 12, 13 | cm h | common-mode transient immunity at output high i f = 0 ma, v o > 2 v, v cm = 1,000 v (6) 20 40 kv/? 14 | cm l | common-mode transient immunity at output low i f = 6.0 ma, v o < 0.8 v, v cm = 1,000 v (6) 20 40 kv/? 14 symbol parameter conditions min. typ. max. units figure data rate r l = 350 10 mbit/sec t phl propagation delay to logic low output r l = 350 , c l = 15 pf 37 80 ns 8, 9, 13 t plh propagation delay to logic high output r l = 350 , c l = 15 pf 41 90 ns 8, 9, 13 pwd pulse width distortion, | t phl ?t plh | r l = 350 , c l = 15 pf 4 25 ns 10, 11, 13 t psk propagation delay skew r l = 350 , c l = 15 pf (5) 40 ns t r output rise time (10% to 90%) r l = 350 , c l = 15 pf 22 ns 12, 13 t f output fall time (90% to 10%) r l = 350 , c l = 15 pf 9 ns 12, 13 | cm h | common-mode transient immunity at output high i f = 0 ma, v o > 2 v, v cm = 1,000 v (6) 20 40 kv/? 14 | cm l | common-mode transient immunity at output low i f = 6.0 ma, v o < 0.8 v, v cm = 1,000 v (6) 20 40 kv/? 14
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 7 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin notes: 5. t psk is equal to the magnitude of the worst-case difference in t phl and/or t plh between any two units from the same manufacturing date code that are operated at same case temperature(??), at same operating conditions, with equal loads (r l = 350 , c l = 15 pf), and with an input rise time less than 5 ns. 6. common-mode transient immunity at output high is the maximum tolerable positive dvcm/dt on the leading edge of the common-mode impulse signal, v cm , to assure that the output remains high. common-mode transient immunity at output low is the maximum tolerable negative dvcm/dt on the trailing edge of the common pulse signal, v cm , to assure that the output remains low.
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 8 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin typical performance characteristics i f ?input led curent (ma) 100 10 1 0.1 0.01 0.001 i fhl ?threshold input curent (ma) 3.0 2.5 2.0 1.5 1.0 figure 1. input led current (i f ) vs. forward voltage (v f ) 0.6 0.8 1.0 1.4 1.6 2.0 1.8 1.2 v f ?forward voltage (v) 25 c figure 2. threshold input current (i fhl ) vs. ambient temperature -40 -20 0 20 40 60 80 100 t a ?ambient temperature ( c) i ol = 13 ma v cc = 3.3 v v cc = 5.0 v -40 c t a = 100 c v ol ?logic low output voltage (v) 0.50 0.45 0.40 0.35 0.30 0.25 0.20 figure 3. logic low output voltage (v ol ) vs. ambient temperature -40 -20 0 20 40 60 80 100 t a ?ambient temperature ( c) i ol = 13 ma i f = 6 ma v cc = 3.3 v v cc = 5.0 v i oh ?logic high output supply current ( a) 30 25 20 15 10 5 0 figure 4. logic high output current (i oh ) vs. ambient temperature -40 -20 0 20 40 60 80 100 t a ?ambient temperature ( c) i f = 250 a v o = 3.3 v / 5.0 v v cc = 3.3 v v cc = 5.0 v i ccl ?logic low output supply current (ma) 10 8 6 4 2 0 figure 5. logic low output supply current (i ccl ) vs. ambient temperature -40 -20 0 20 40 60 80 100 t a ?ambient temperature ( c) i f = 10 ma v cc = 3.3 v v cc = 5.0 v i cch ?logic high output supply current (ma) 10 8 6 4 2 0 figure 6. logic high output supply current (i cch ) vs. ambient temperature -40 -20 0 20 40 60 80 100 t a ?ambient temperature ( c) i f = 0 ma v cc = 3.3 v v cc = 5.0 v
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 9 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin typical performance characteristics (continued) figure 12. rise time (t r ) and fall time (t f ) vs. ambient temperature -40 -20 0 20 40 60 80 100 t a ?ambient temperature ( c) 40 30 20 10 0 i cc ?output supply current (ma) 10 8 6 4 2 0 figure 7. output supply current (i cc ) vs. output supply voltage (v cc ) 3.0 3.5 4.0 4.5 5.0 5.5 v cc ?output supply voltage (v) i f = 0 ma (for i cch ), 10 ma (for i ccl ) t a = 25 c i cch i ccl t p ?propagation delay (ns) 80 70 60 50 40 30 20 figure 8. propagation delay vs. ambient temperature -40 -20 0 20 40 60 80 100 t a ?ambient temperature ( c) frequency = 5 mhz, 50% duty cycle i f = 6 ma, r l = 350 t plh @ v cc = 3.3 v t plh @ v cc = 5.0 v t phl @ v cc = 5.0 v t phl @ v cc = 3.3 v t p ?propagation delay (ns) 70 60 50 40 30 20 figure 9. propagation delay vs. input led current (i f ) 5678910 i f ?input led current (ma) frequency = 5 mhz, 50% duty cycle r l = 350 , t a = 25 c t plh @ v cc = 3.3 v t r @ v cc = 5.0 v t r @ v cc = 3.3 v t f @ v cc = 3.3 v t f @ v cc = 5.0 v t plh @ v cc = 5.0 v t phl @ v cc = 5.0 v t phl @ v cc = 3.3 v (|t phl ?t plh |) ?pulse width distortion (ns) 20 16 12 8 4 0 figure 10. pulse width distortion vs. ambient temperature -40 -20 0 20 40 60 80 100 t a ?ambient temperature ( c) v cc = 3.3 v v cc = 3.3 v v cc = 5.0 v v cc = 5.0 v frequency = 5 mhz, 50% duty cycle i f = 6 ma, r l = 350 (|t phl ?t plh |) ?pulse width distortion (ns) t r , t f ?rise, fall time (ns) 25 20 15 10 5 0 figure 11. pulse width distortion vs. input led current (i f ) 5678910 i f ?input led current (ma) frequency = 5 mhz, 50% duty cycle r l = 350 , t a = 25 c frequency = 5 mhz, 50% duty cycle i f = 6 ma, r l = 350
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 10 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin test circuit figure 13. test circuit for propagation delay, rise time, and fall time figure 14. test circuit for instantaneous common-mode rejection voltage output 350 v o monitoring node t phl c l r m i f 0.1 f bypass pulse gen. 5 mhz t f = tr = 5 ns dc = 50% input monitoring mode t f t r t plh (i f = 6 ma) 50% v ol 90% 1.5 v 10% input 350 v o (i f = 0 ma) v o (i f = 6 ma) v o monitoring node pulse gen v cc c l v cm v cm r m sw i f 0.1 f bypass 1 kv 0 v v oh 2 v 0.8 v v ol 90% 10% t r t f
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 11 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin ordering information all packages are lead free per jedec: j-std-020b standard. marking information part number package packing method FOD8160 wide body sop 5-pin tube (100 units per tube) FOD8160r2 wide body sop 5-pin tape and reel (1,000 units per reel) FOD8160v (preliminary) wide body sop 5-pin, din en/iec60747-5-5 option (pending approval) tube (100 units per tube) FOD8160r2v (preliminary) wide body sop 5-pin, din en/ iec60747-5-5 option (pending approval) tape and reel (1,000 units per reel) 1 2 8 4 3 5 de?itions 1 fairchild logo 2 device number, e.g., ?160 for FOD8160 3 din en/iec60747-5-5 option (only appears on component ordered with this option) 4 plant code, e.g., ? 5 last-digit year code, e.g., ? for 2013 6 two-digit work week ranging from ?1 to ?3 7 lot-traceability code 8 package assembly code, w 8160 d x yy kk v 6 7 w
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 12 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin re?w pro?e pro?e freature pb-free assembly pro?e temperature minimum (t smin ) 150? temperature maximum (t smax ) 200? time (t s ) from (t smin to t smax ) 60?20 seconds ramp-up rate (t l to t p ) 3?/second max. liquidous temperature (t l ) 217? time (t l ) maintained above (t l ) 60?50 seconds peak body package temperature 260? +0? / ?? time (t p ) within 5? of 260? 30 seconds ramp-down rate (t p to t l ) 6?/second max. time 25? to peak temperature 8 minutes max. time (seconds) temperature (?) time 25c to peak 260 240 220 200 180 160 140 120 100 80 60 40 20 0 t l t s t l t p t p t smax t smin 120 preheat area max. ramp-up rate = 3c/s max. ramp-down rate = 6c/s 240 360
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 13 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin package dimensions package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package speci?ations do not expand the terms of fairchilds worldwide terms and conditions, speci?ally the warranty therein, which covers fairchild products. always visit fairchild semiconductors online packaging area for the most recent package drawings: http://www .f airchildsemi.com/pac kaging/ land pattern recommendation notes: unless otherwise specified a) this package does not conform to any standard. b) all dimensions are in millimeters. c) dimensions are exclusive of burrs, mold flash and tie bar protrusions d) drawing conforms to asme y14.5m-1994 e) drawing file name: mkt-m05arev2 scale: 3.2:1 9.20 1.27 3.95 pin one indicator a 1.35 1.15 0.25 0.74 0.44 1 3 6 4 11.38 a b c 0.20 c a-b 2x 1 3 6 4 4.60 0.10 c d 2x 2.54 5x 0.51 0.31 0.25 c a-b d 11.80 11.60 d 0.60 0.33 c 5 tips 2.65 2.45 2.90 2.60 0.30 0.10 0.10 c seating plane 0.10 c 5x gauge plane seating plane c 0.25 0.19 (r1.29) (r0.54) 1.27 1.38 8 0 2.54
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 14 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin carrier tape specification (soic-5l opto r2 & r2v option) symbol description dimmension in mm w tape width 24.00 +0.20 / -0.10 t tape thickness 0.30 ?.05 po sprocket hole pitch 4.00 ?.20 do sprocket hole diameter 1.50 +0.10 / -0.00 d1 pocket hole diameter 1.50 +0.25 / -0.00 e sprocket hole location 1.75 ?.10 f pocket location 11.50 ?.10 p2 2.00 ?.10 p pocket pitch 8.00 ?.10 ao pocket dimension 4.50 ?.10 bo 12.00 ?.10 ko 3.35 ?.10 k1 2.85 ?.10 w1 cover tape width 21.30 ?.10 d cover tape thickness 0.05 ?.01 max component rotation or tilt 10 t ko k1 d w1 bo ao do po e w f p p2 d1 user direction of feed
?012 fairchild semiconductor corporation www.fairchildsemi.com FOD8160 rev. 1.0.1 15 FOD8160 ?high noise immunity, 3.3 v / 5 v, 10 mbit/sec, logic gate optocoupler in wide-body sop 5-pin

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