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december 2010 ? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input nc7sv17 tinylogic ? ulp-a single buffer with schmitt trigger input features ? 0.9v to 3.6v v cc supply operation ? 3.6v over-voltage tolerant i/os at v cc from 0.9v to 3.6v ? extremely high speed t pd - 1.5ns: typical for 2.7v to 3.6v v cc - 1.8ns: typical for 2.3v to 2.7v v cc - 2.0ns: typical for 1.65v to 1.95v v cc - 3.2ns: typical for 1.4v to 1.6v v cc - 5.9ns: typical for 1.1v to 1.3v v cc - 12.0ns: typical for 0.9v v cc ? power-off high-impedance inputs and outputs ? high static drive (i oh /i ol ) - 24ma at 3.00v v cc - 18ma at 2.30v v cc - 6ma at 1.65v v cc - 4ma at 1.4v v cc - 2ma at 1.1v v cc - 0.1ma at 0.9v v cc ? uses proprietary quiet series? noise/emi reduction circuitry ? ultra-small micropak? packages ? ultra-low dynamic power description the nc7sv17 is a single buffer with schmitt trigger input from fairchild's ultra-low power (ulp-a) series of tinylogic ? . ulp-a is ideal for applications that require extreme high speed, high drive, and low power. this product is designed for a wide low-voltage operating range (0.9v to 3.6v v cc ) and applications that require more drive and speed than the tinylogic ? ulp series, but still offer best-in-class, low-power operation. the nc7sv17 is uniquely designed for optimized power and speed and is fabricated with an advanced cmos technology to achieve high-speed operation while maintaining low cmos power dissipation. ordering information part number top mark package packing method nc7sv17p5x v17 5-lead sc70, eiaj sc-88a, 1.25mm wide 3000 units on tape & reel nc7sv17l6x g5 6-lead micropak?, 1.00mm wide 5000 units on tape & reel nc7sv17fhx g5 6-lead, micropak 2?, 1x1mm body, .35mm pitch 5000 units on tape & reel tinylogic? is a registered trademark of fairchild semiconductor corporation. micropak? and quiet series? are trademarks of fairchild semiconductor corporation.
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 2 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input battery life 700 600 500 400 300 200 100 0 0.9 1.2 ulp-a (sv) ulp (sp) uhs (sz) 1.5 1.8 2.5 3.3 5.0 battery life (days) v cc supply voltage figure 1. battery life vs. v cc supply voltage notes: 1. tinylogic ? ulp and ulp-a with up to 50% less power consum ption can extend battery life significantly. battery life = (v battery ?i battery ?.9)/(p device )/24hrs/day where, p device = (i cc ? v cc ) + (c pd + c l ) ? v cc2 ? f. 2. assumes ideal 3.6v lithium ion battery with curr ent rating of 900mah and derated 90% and device frequency at 10mhz, with c l =15pf load. connection diagram ieee/iec a 1 y figure 2. logic symbol
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 3 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input pin configurations nc v cc 1 5 a 2 gnd y 3 4 1 nc 2 a 3 6 5 4 gnd v cc nc y figure 3. sc70 (top view) figure 4. micropak? (top through view) pin definitions pin # sc70 pin # micropak name description 1 1 nc no connect 2 2 a input 3 3 gnd ground 4 4 y output 5 6 v cc supply voltage 5 nc no connect function table inputs output a y l l h h h=high logic level l=low logic level
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 4 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v cc supply voltage -0.5 4.6 v v in dc input voltage -0.5 4.6 v v out dc output voltage high or low state (3) -0.5 v cc + 0.5 v v cc =0v -0.5 4.6 i ik dc input diode current v in < 0v -50 ma i ok dc output diode current v out < 0v -50 ma v out > v cc +50 i oh/ i ol dc output source/sink current 50 ma i cc or i gnd dc v cc or ground current per supply pin 50 ma t stg storage temperature range -65 +150 c t j junction temperature under bias +150 c t l junction lead temperature, soldering 10 seconds +260 c p d power dissipation at +85c sc70-5 150 mw micropak?-6 130 micropak2?-6 120 esd human body model, jedec:jesd22-a114 4000 v charge device model, jedec:jesd22-c101 2000 note: 3. io absolute maximum rating must be observed. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter conditions min. max. unit v cc supply voltage 0.9 3.6 v v in input voltage 0 3.6 v v out output voltage v cc =0v 0 3.6 v high or low state 0 v cc i oh /i ol output current in i oh /i ol v cc =3.0v to 3.6v 24 ma v cc =2.3v to 3.6v 18 v cc =1.65v to 1.95v 6 v cc =1.4v to 1.6v 4 v cc =1.1v to 1.3v 2 v cc =0.9v 0.1 t a operating temperature, free air -40 +85 c t/ v minimum input edge rate v in =0.8v to 2.0, v cc =3.0v 10 ns/v ja thermal resistance sc70-5 425 c/w micropak?-6 500 micropak2?-6 560 note: 4. unused inputs must be held high or low. they may not float.
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 5 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input dc electrical characteristics symbol parameter v cc conditions t a =25c t a =-40 to 85c units min. max. min. max. v p positive threshold voltage 0.90 0.30 0.70 0.30 0.70 v 1.10 0.40 1.00 0.40 1.00 1.40 0.50 1.40 0.50 1.40 1.65 0.70 1.50 0.70 1.50 2.30 1.00 1.80 1.00 1.80 2.70 1.50 2.20 1.50 2.20 v n negative threshold voltage 0.90 0.10 0.60 0.10 0.60 v 1.10 0.15 0.70 0.15 0.70 1.40 0.20 0.80 0.20 0.80 1.65 0.25 0.90 0.25 0.90 2.30 0.40 1.15 0.40 1.15 2.70 0.60 1.50 0.60 1.50 v h hysteresis voltage 0.90 0.07 0.50 0.07 0.50 v 1.10 0.08 0.60 0.08 0.60 1.40 0.09 0.80 0.09 0.80 1.65 0.15 1.00 0.15 1.00 2.30 0.25 1.10 0.25 1.10 2.70 0.60 1.20 0.60 1.20 v oh high level output voltage 0.90 i oh =-100a v cc -0.1 v cc -0.1 v 1.10 v cc 1.30 v cc -0.1 v cc -0.1 1.40 v cc 1.60 v cc -0.2 v cc -0.2 1.65 v cc 1.95 v cc -0.2 v cc -0.2 2.30 v cc 2.70 v cc -0.2 v cc -0.2 2.70 v cc 3.60 v cc -0.2 v cc -0.2 1.10 v cc 1.30 i oh =-2ma .75 x v cc .75 x v cc 1.40 v cc 1.60 i oh =-4ma .75 x v cc .75 x v cc 1.65 v cc 1.95 i oh =-6ma 1.25 1.25 2.30 v cc 2.70 2.0 2.0 2.30 v cc 2.70 i oh =-12ma 1.8 1.8 2.70 v cc 3.60 2.2 2.2 2.30 v cc 2.70 i oh =-18ma 1.7 1.7 2.70 v cc 3.60 2.4 2.4 2.70 v cc 3.60 i oh =-24ma 2.2 2.2 continued on following page?
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 6 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input dc electrical characteristics (continued) symbol parameter v cc conditions t a =25c t a =-40 to 85c units min. max. min. max. v ol low level output voltage 0.90 i ol =100a 0.10 0.10 v 1.10 v cc 1.30 0.10 0.10 1.40 v cc 1.60 0.20 0.20 1.65 v cc 1.95 0.20 0.20 2.30 v cc 2.70 0.20 0.20 2.70 v cc 3.60 0.20 0.20 1.10 v cc 1.30 i ol =2ma 0.25 x v cc 0.25 x v cc 1.40 v cc 1.60 i ol =4ma 0.25 x v cc 0.25 x v cc 1.65 v cc 1.95 i ol =6ma 0.30 0.30 2.30 v cc 2.70 i ol =12ma 0.40 0.40 2.70 v cc 3.60 0.40 0.40 2.30 v cc 2.70 i ol =18ma 0.60 0.60 2.70 v cc 3.60 0.40 0.40 2.70 v cc 3.60 i ol =24ma 0.55 0.55 i in input leakage current 0.90 to 3.60 0 v in 3.60 0.1 0.5 a i off power off leakage current 0 0 (v in, v o ) 3.60 0.5 0.5 a i cc quiescent supply current 0.90 to 3.60 v in =v cc , or gnd 0.9 0.9 a v cc v in 3.6v 0.9 ac electrical characteristics symbol parameter v cc conditions t a =25c t a =-40 to 85c units figure min. typ. max. min. max. t phl , t plh propagation delay 0.90 c l =15pf, r l =1m 12 ns figure 5 figure 6 1.10 v cc 1.30 c l =15pf, r l =2k 2.0 5.9 10.0 1.0 14.9 1.40 v cc 1.60 1.0 3.2 6.1 0.9 7.0 1.65 v cc 1.95 c l =30pf, r l =500 1.0 2.0 5.2 0.7 6.2 2.30 v cc 2.70 0.8 1.8 3.7 0.6 4.4 2.70 v cc 3.60 0.7 1.5 3.3 0.5 3.8 c in input capacitance 0 2 pf c pd power dissipation capacitance 0.90 to 3.60 v in =0v or v cc , f=10mhz 10 pf
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 7 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input ac loadings and waveforms v cc dut c l pf r l test signal figure 5. ac test circuit figure 6. ac waveforms symbol v cc 3.3v 0.3v 2.5v 0.2v 1.8v 0. 15v 1.5v 0.1v 1.2v 0.1v 0.9v v mi 1.5v v cc /2 v cc /2 v cc /2 v cc /2 v cc /2 v mo 1.5v v cc /2 v cc /2 v cc /2 v cc /2 v cc /2
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 8 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input physical dimensions figure 7. 5-lead, sc70, eiaj sc-88a, 1.25mm wide package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . tape and reel specification please visit fairchild semiconductor?s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/analog/pdf/sc70-5_tr.pdf . package designator tape section cavity number cavity status cover type status p5x leader (start end) 125 (typical) empty sealed carrier 3000 filled sealed trailer (hub end) 75 (typical) empty sealed
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 9 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input physical dimensions 2. dimensions are in millimeters 1. conforms to jedec standard m0-252 variation uaad 4. filename and revision: mac06arev4 notes: 3. drawing conforms to asme y14.5m-1994 top view recommened land pattern bottom view 1.45 1.00 a b 0.05 c 0.05 c 2x 2x 0.55max 0.05 c (0.49) (1) (0.75) (0.52) (0.30) 6x 1x 6x pin 1 detail a 0.075 x 45 chamfer 0.25 0.15 0.35 0.25 0.40 0.30 0.5 (0.05) 1.0 5x detail a pin 1 terminal 0.40 0.30 0.45 0.35 0.10 0.00 0.10 cba 0.05 c c 0.05 c 0.05 0.00 5x 5x 6x (0.13) 4x 6x pin 1 identifier (0.254) 5. pin one identifier is 2x length of any 5 other line in the mark code layout. figure 8. 6-lead, micropak?, 1.0mm wide package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . tape and reel specification please visit fairchild semiconductor?s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf . package designator tape section cavity number cavity status cover type status l6x leader (start end) 125 (typical) empty sealed carrier 5000 filled sealed trailer (hub end) 75 (typical) empty sealed
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 10 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input physical dimensions 1.00 b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 1994 notes: a. complies to jedec mo-252 standard 0.05 c a b 0.55max 0.05 c c 0.35 0.09 0.19 123 0.35 0.25 5x 6x detail a 0.60 (0.08) 4x (0.05) 6x 0.40 0.30 0.075x45 chamfer 5x 0.40 0.35 1x 0.45 6x 0.19 top view bottom view 0.66 0.10 cba .05 c 0.89 pin 1 0.05 c 2x 2x 1.00 d. landpattern recommendation is based on fsc e. drawing filename and revision: mgf06arev3 0.52 0.73 0.57 0.20 6x 1x 5x recommended land pattern for space constrained pcb detail a pin 1 lead scale: 2x alternative land pattern for universal application design. 0.90 min 250um 65 4 0.35 (0.08) 4x side view figure 9. 6-lead, micropak2, 1x1mm body, .35mm pitch package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . tape and reel specification please visit fairchild semiconductor?s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/micropak2_6l_tr.pdf . package designator tape section cavity number cavity status cover type status fhx leader (start end) 125 (typical) empty sealed carrier 5000 filled sealed trailer (hub end) 75 (typical) empty sealed
? 1996 fairchild semiconductor corporation www.fairchildsemi.com nc7sv17 ? rev. 1.0.6 11 nc7sv17 ? tinylogic ? ulp-a single buffer with schmitt trigger input

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