st2341s23rg p channel enhancement mode mosfet -5.3a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com st2341srg3rg 2006. rev.1 description st2341s23rg is the p-channel logic enhancement mode power field effect transistor which is produced using high cell density, dmos tre nch technology. this high density process is especially tailored to minimize on-state resistance. these devices are particularly suited for low voltage application suc h as cellular phone and notebook computer power management, other battery powered ci rcuits, and low in-line power loss are required. the product is in a very small o utline surface mount package. pin configuration sot-23-3l 1.gate 2.source 3.drain part marking sot-23-3l y: year code a: process code feature -20v/-3.3a, r ds(on) = 30m-ohm (typ.) @vgs = -4.5v -20v/-2.8a, r ds(on) = 40m-ohm @vgs = -2.5v -20v/-2.3a, r ds(on) = 53m-ohm @vgs = -1.8v super high density cell design for extremely low r ds(on) exceptional on-resistance and maximum dc current capability sot-23-3l package design 3 1 2 d g s 3 1 2 41ya
st2341s23rg p channel enhancement mode mosfet -5.3a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com st2341srg3rg 2006. rev.1 absoulte maximum ratings (ta = 25 unless otherwise noted ) parameter symbol typical unit drain-source voltage v dss -20 v gate-source voltage v gss 12 v continuous drain currenttj=150 ) t a =25 t a =70 i d -5.3 -4.5 a pulsed drain current i dm -20 a continuous source current (diode conduction) i s -1.0 a power dissipation t a =25 t a =70 p d 1.25 0.80 w operation junction temperature t j 150 storgae temperature range t stg -55/150 thermal resistance-junction to ambient r ja 140 /w
st2341s23rg p channel enhancement mode mosfet -5.3a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com st2341srg3rg 2006. rev.1 electrical characteristics ( ta = 25 unless otherwise noted ) parameter symbol condition min typ max unit static drain-source breakdown voltage v (br)dss v gs =0v,i d =-250ua -20 v gate threshold voltage v gs(th) v ds =vgs,i d =-250ua -0.35 -0.9 v gate leakage current i gss v ds =0v,v gs = 20v 100 na zero gate voltage drain current i dss v ds =-20v,v gs =0v -1 ua v ds =-20v,v gs =0v t j =55 -10 on-state drain current i d(on) v ds -5v,v gs =-4.5v -6 a drain-source on-resistance r ds(on) v gs =-4.5v,i d =-3.3a v gs =-2.5v,i d =-2.8a v gs =-1.8v,i d =-2.3a 0.030 0.040 0.053 0.040 0.045 0.057 forward transconductance g fs v ds =-5v,i d =-4v 3.0 s diode forward voltage v sd i s =-1a,v gs =0v -0.8 -1.2 v dynamic total gate charge q g v ds =-6v v gs =-4.5v i d -3.3a 8.0 13 nc gate-source charge q gs 1.2 gate-drain charge q gd 2.2 input capacitance c iss v ds =-6.0v v gs =0v f=1mh z 700 pf output capacitance c oss 160 reverse transfer capacitance c rss 120 turn-on time t d(on) tr v dd =-6v r l =6 i d =-1.0a v gen =-4.5v r g =6 15 25 ns 35 55 turn-off time t d(off) tf 60 90 40 40
st2341s23rg p channel enhancement mode mosfet -5.3a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com st2341srg3rg 2006. rev.1 typical characterictics (25 unless noted)
st2341s23rg p channel enhancement mode mosfet -5.3a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com st2341srg3rg 2006. rev.1 typical characterictics (25 unless noted)
st2341s23rg p channel enhancement mode mosfet -5.3a stanson technology 120 bentley square, mountain view, ca 94040 usa www.stansontech.com st2341srg3rg 2006. rev.1 sot-23-3l package outline
|
