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| specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appli ances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliab ility and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. o1012nkpc 20120823-s00005 no.a2121-1/24 LV8702V overview the LV8702V is a 2-channel full-bridge dr iver ic that can drive a stepping mo tor driver, which is capable of micro- step drive and supports quarter step. current is controlled according to motor load and rotational speed at half step, half step full-torque and quarter step ex citation, thereby highly efficient drive is realized. consequently, the reduction of power consumption, heat generation, vibration and noise is achieved. features ? built-in 1ch pwm current control stepping motor driver (bipolar type) ? bicdmos process ic ? ron (high-side ron: 0.3 , low-side ron: 0.25 , total: 0.55 , ta = 25oc, i o = 2.5a) ? excitation mode is configurable as follows: full step/half step full-torque /half step/quarter step ? excitation step moves forward only with step signal input ? i o max=2.5a ? built-in output short protection circuit (latch method) ? built-in thermal shut down circuit ? control power supply is unnecessary ? built-in high-efficient drive function (supports half st ep full-torque/half step/quarter step excitation mode) ? built-in step-out detection function (step-out detection may not be accurate during high speed rotation) specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit power supply voltage v m max 36 v output peak current i o peak tw 10ms, duty 20% 3 a output current i o max 2.5 a logic input voltage v in -0.3 to +6 v dst1, dst2, moni, sst pin input voltage vdst1, vdst2, vmoni, vsst -0.3 to +6 v allowable power dissipation pd max ta 25 c * 5.5 w operating temperature topr -40 to +85 c storage temperature tstg -55 to +150 c * specified board : 90.0mm 90.0mm 1.6mm, glass epoxy 4-layer board, with backside mounting. continued on next page. bi-cmos lsi pwm current control high-efficient stepping motor driver orderin g numbe r : ena2121
LV8702V no.a2121-2/24 continued from preceding page. caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of abso lute maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temper ature change, the reliability of the ic ma y be degraded. please contact us for the furt her details. recommended operating range at ta = 25 c parameter symbol conditions ratings unit range of power supply voltage v m 9 to 32 v logic input voltage v in 0 to 5.5 v range of vref input voltage vref 0 to 3 v electrical characteristics at ta = 25c, v m = 24v, vref = 1.5v ratings parameter symbol conditions min typ max unit consumption current during standby imstn st = ?l? 110 400 a consumption current im st = ?h?, oe = ?l?, step = ?l?, non-load 4.5 6.5 ma vreg5 output voltage vreg5 i o = -1ma 4.5 5 5.5 v thermal shutdown temperature tsd design certification 150 180 210 c thermal hysteresis width tsd design certification 40 c motor driver ronu i o = 2.5a, source-side ron 0.3 0.4 output on resistor rond i o = 2.5a, sink-side ron 0.25 0.33 output leak current i o leak vm = 32v 50 a forward diode voltage vd id = -2.5a 1.2 1.4 v i in l v in = 0.8v 4 8 12 a logic pin input current i in h v in = 5v 30 50 70 a adin pin input voltage vadin ra2 = 100k : refer to 15-4) 0 12 v logic input ?h? level voltage v in h 2.0 v logic input ?l? level voltage v in l 0.8 v vtdac0_w step0 (initial status, 1ch comparator level) 290 300 310 mv vtdac1_w step1 (initial + 1) 264 276 288 mv vtdac2_w step2 (initial + 2) 199 210 221 mv quarter step vtdac3_w step3 (initial + 3) 106 114 122 mv vtdac0_h step0 (initial status, 1ch comparator level) 290 300 310 mv half step vtdac2_h step2 (initial + 1) 199 210 221 mv vtdac0_hf step0 (initial status, 1ch comparator level) 290 300 310 mv half step (full-torque) vtdac2?_hf step2? (initial + 1) 290 300 310 mv current selection reference voltage level full step vtdac2?_f step2? (initial status, 1ch comparator level) 290 300 310 mv chopping frequency fchop cchop = 200pf 35 50 65 khz chop pin charge/discharge current ichop 7 10 13 a chopping oscillator circuit threshold voltage vtup 0.8 1 1.2 v vref pin input current ir ef vref = 1.5v -0.5 a dst1, dst2, moni, sst pin saturation voltage idst1 = idst2 = imoni = isst = 1ma 400 mv charge pump vg output voltage vg 28 28.7 29.8 v rise time tong vg = 0.1 f 0.5 ms oscillator frequency fosc 90 125 160 khz LV8702V no.a2121-3/24 package dimensions unit : mm (typ) 3285b 0 2.0 1.0 4.0 3.0 5.0 5.5 2.9 2.0 3.8 6.0 -- 40 0 -- 20 60 80 40 20 100 pd max -- ta ambient temperature, ta -- c allowable power dissipation, pd max -- w four-layer circuit board *1 four-layer circuit board *2 *1 with components mounted on the exposed die-pad board *2 with no components mounted on the exposed die-pad board sanyo : ssop44j(275mil) 15.0 0.2 0.65 0.22 0.05 5.6 0.5 7.6 (0.68) (7.8) (3.6) (1.5) 1.7 max top view side view side view bottom view 12 44 LV8702V no.a2121-4/24 substrate specifications (substrate recommended for operation of LV8702V) size : 90mm 90mm 1.6mm (four-layer substrate) material : glass epoxy copper wiring density : l1 = 85%, l2 = 90% l1: copper wiring pattern diagram l2: copper wiring pattern diagram l3: gnd layer l4: power supply layer cautions 1) the data for the case with the exposed die-pad substrate mounted shows the values when 90% or more of the exposed die-pad is wet. 2) for the set design, employ the derating design with sufficient margin. stresses to be derated include the voltage, current, junctio n temperature, power loss, an d mechanical stress such as vibration, impact, and tension. accordingly, the design must ensure these stresses to be as low or small as possible. the guideline for ordinary derating is shown below: (1)maximum value 80% or less for the voltage rating (2)maximum value 80% or less for the current rating (however this does not apply to high efficiency drive because operatin g current is lower than the setting current.) (3)maximum value 80% or less for the temperature rating 3) after the set design, be sure to verify the design with the actual product. confirm the solder joint state and verify also the re liability of solder joint for the exposed die-pad, etc. any void or deterioration, if observed in the solder jo int of these parts, causes deteriorated thermal conduction, possibly resulting in thermal destruction of ic. LV8702V no.a2121-5/24 pin assignment 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 vm swout vg cp2 pgnd1 out1a gmg2 out1a gmg1 vm1 gad vm1 fr rf1 step rf1 st out1b rst out1b adin out2a md2 out2a md1 rf2 vreg5 rf2 dst2 vm2 dst1 vm2 out2b moni out2b oe pgnd2 sst gst1 chop gst2 vref top view LV8702V cp1 sgnd LV8702V no.a2121-6/24 block diagram gmg2 gmg1 swout adin st gad step rst md2 md1 fr dst2 dst1 oe sst cp1 vg out1a vm1 rf1 rf2 pre-output out1b out2a vm2 out2b gst2 gst1 cp2 vreg5 moni vref sgnd pgnd charge pump regulator attenuat oscillator output control logic vm chop current (w1-2/1-2/ 1-2full/2) signal processor2 current (w1-2/1-2/ 1-2full/2) tsd lvs pre-output pre-output pre-output signal processor1 high-efficient drive ctrl logic + - + - + - LV8702V no.a2121-7/24 pin functions pin no. pin name description 1 swout control signal output pin 2 cp2 capacitor connection pin for charge pump 3 cp1 capacitor connection pin for charge pump 4 gmg2 driving capability margin adjuster pin 5 gmg1 driving capability margin adjuster pin 6 gad high-efficient drive switching pin 7 fr forward/ reverse signal input pin 8 step step signal input pin 9 st chip enable pin 10 rst reset signal input pin 11 adin control signal input pin 12 md2 excitation mode switching pin 13 md1 excitation mode switching pin 14 vreg5 capacitor connection pin for internal power supply 15 dst2 drive status warning output pin 16 dst1 drive status warning output pin 17 moni position detection monitor pin 18 oe output enable signal input pin 19 sst motor stop detection output pin 20 chop capacitor connection pin for chopping frequency setting 21 vref constant current cont rol reference voltage input pin 22 sgnd signal gnd 23 gst2 boost-up adjuster pin 24 gst1 boost-up adjuster pin 25 pgnd2 2ch power gnd 26, 27 out2b 2ch outb output pin 28, 29 vm2 2ch motor power supply connection pin 30, 31 rf2 2ch current sense resistor connection pin 32, 33 out2a 2ch outa output pin 34, 35 out1b 1ch outb output pin 36, 37 rf1 1ch current sense resistor connection pin 38, 39 vm1 1ch motor power supply connection pin 40, 41 out1a 1ch outa output pin 42 pgnd1 1ch power gnd 43 vg capacitor connection pin for charge pump 44 vm motor power supply connection pin LV8702V no.a2121-8/24 pin description pin no. pin name equivalent circuit 4 5 6 7 8 10 12 13 18 23 24 gmg2 gmg1 gad fr step rst md2 md1 oe gst2 gst1 v reg5 gnd 100k 10k 9 st v reg5 gnd 80k 20k 10k 25 26, 27 28, 29 30, 31 32, 33 34, 35 36, 37 38, 39 40, 41 42 pgnd2 out2b vm2 rf2 out2a out1b rf1 vm1 out1a pgnd1 500 10k 500 28 38 31 42 37 40 41 34 35 gnd 30 36 25 32 33 26 27 29 39 continued on next page. LV8702V no.a2121-9/24 continued from preceding page. pin no. pin name equivalent circuit 2 3 43 44 cp2 cp1 vg vm gnd 100 v reg5 3 44 2 43 21 vref 500 gnd v reg5 14 vreg5 80k 26k 2k gnd vm 15 16 17 19 dst2 dst1 moni sst vreg5 gnd 100k continued on next page. LV8702V no.a2121-10/24 continued from preceding page. pin no. pin name equivalent circuit 20 chop gnd 500 500 v reg5 1 swout vm pgnd2 pgnd1 11 adin 100k 2pf 2pf 2k gnd vm 22 sgnd LV8702V no.a2121-11/24 operation description 1. chip enable function the mode of the ic is switched with st pin between standby and operation mode. in standby mode, the ic is set to power saving mode and all the logics are reset. during st andby mode, the operation of the internal regulator circuit and the charge pump circuit are stopped. st status internal regulator charge pump l or open standby mode standby standby h operating mode operation operation 2. step pin function the excitation step progresses by inputting the step signal to the stp pin. input st step operation mode l or open x* standby mode h excitation step forward h excitation step keep * don?t care 3. input timing rst step md1/ md2 gmg1/ gmg2 gst1/ gst2 fr oe gad tds1 (rst step) tds1 (md step) tdh1 (step md) tsteph tstepl tds1 (fr step) tdh1 (step fr) tds2 (gad step) tdh2 (step gad) tds2 (gmg step) tdh2 (step gmg) tds2 (gst step) tdh2 (step gst) tds1 (oe step) tdh1 (step oe) tsteph/tstepl : clock h/l pulse width (min 12.5 s) tds1 : data set-up time (min 12.5 s) tdh1 : data hold time (min 12.5 s) tds2 : data set-up time (min 25 s) tdh2 : data hold time (min 25 s) LV8702V no.a2121-12/24 4. position detection monitor function the moni position detection monitoring pin is of an open drain type. when the excitation position is in the initial positi on, the moni output is placed in the on state. (refer to "examples of current waveforms in each of the excitation modes.") 5. setting constant-current control reference current this ic is designed to automatically exercise pwm constant-current chopping control for the motor current by setting the output current. based on the voltage input to the vref pin and the resistance connected between rf and gnd, the output current that is subject to the constant-current control is set using the calculation formula below: i out = (vref/5)/rf resistance the above setting is the output current at 100% of each excitation mode. for example, where vref=1.5v and rf resistance 0.2 , we obtain output current as follows. i out = 1.5v/5/0.2 = 1.5a when high-efficient drive function is on, i out is adjusted automatically within the range of the current value set by vref. 6. reset function rst operation mode l or open normal operation h reset status when rst pin = ?h?, the excitation position of the output is set to the initial position forcibly and moni output is turned on. and then by setting rst = ?l?, the excitation position moves forward with the next step signal. rst reset 0% step moni 1ch output 2ch output initial position LV8702V no.a2121-13/24 7. output enable function oe operation mode h output off l or open output on when oe pin = ?h?, the output is turned off forcibly and becomes a hi gh-impedance output. however, since the internal logic circuit is in operation, an excitation position moves forward if step signal is input to step pin. therefore, by setting back to oe = ?l?, th e output pin outputs signal based on the excitation position by step signal. 8. excitation mode setting function md1 and md2 pin set excitation mode of the stepping motor as follows. initial position md1 md2 excitation mode 1ch 2ch l or open l or open full step excitation 100% -100% h l or open half step excitation 100% 0% l or open h quarter step excitation 100% 0% h h half step excitation (full-torque) 100% 0% the position of excitation mode is set to the initial position when: 1) a power is supplied and 2) counter is reset in each excitation mode. during full step excitation mode, high-efficient drive function is turned off even when gad = ?h?. oe power save mode 0% step moni 1ch output 2ch output the output is in high-impedance state. LV8702V no.a2121-14/24 9. forward/reverse switching function fr operation mode l or open cw h ccw the built-in da converter moves forwar d by 1bit with the rise of step signal that is input to step pin. also a mode is switched between cw and ccw by setting fr pin. in cw mode, the phase of 2ch current delays by 90 compared to that of 1ch current. in ccw mode the phase of 2ch current moves forward by 90 compared to 1ch current. 10. chopping frequency setting when you control constant current of this ic, chopping is performed using the frequency defined in the capacitor (cchop) connected between chop pin and gnd. the calculation for the value of chopping frequency is: fchop = ichop/ (cchopvtchop2) (hz) ichop: capacitor charge and discharge current typ: 10 a vtchop: charge and discharge hysteresis voltage (vtup-vtdown) typ: 0.5v for example, where cchop = 200pf, we obtain fchop as follows: fchop = 10 a/ (200pf0.5v2) = 50khz 11. blanking time if you attempt to control pwm constant current chopping of the motor current, when the mode shifts from decay to charge, noise is generated in sense resistor pin due to the recovery current of parasitic diode flowing into current sense resistor, and this may cause error detection. the blanking time avoids noise at mode switch. during the blanking time, even if noise is generated in sense resistor, a mode does not switch from charge to decay. in this ic, the blanking time is fixed to approximately 1 s. fr cw mode cw mode ccw mode step excitation position 1ch output 2ch output (1) (2) (3) (4) (5) (6) (5) (4) (3) (4) (5) LV8702V no.a2121-15/24 12. output current vector locus (1step is normalized to 90 ) setting current ration in each excitation mode quarter step (%) half step (%) half step full-torque (%) full step (%) step 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 0 100 0 100 0 100 0 1 92 38 2 70 70 70 70 100 100 100 100 3 38 92 4 0 100 0 100 0 100 0 100 0 20 60 100 1ch phase current ratio (%) 2ch phase current ratio (%) 40 2 , (full step, half step full-torque) 80 20 40 60 80 0 1 2 3 4 LV8702V no.a2121-16/24 13. the example of current waveform in each excitation mode full step excitation (cw mode) half step excitation full-torque (cw mode) step moni l1 (%) (%) -100 -100 100 100 0 0 i2 step moni i1 (%) (%) -100 -100 100 100 0 0 i2 LV8702V no.a2121-17/24 half step excitation (cw mode) quarter step excitation (cw mode) step moni i1 (%) -100 -100 100 (%) 100 0 0 i2 step moni i1 (%) -100 -100 100 (%) 100 0 0 i2 LV8702V no.a2121-18/24 14. current control o peration specification (sine wave increase) (sine wave decrease) each current mode is operated acco rding to the following sequence. ? at rise of chopping frequency, the charge mode begins. (in the time defined as the ?blanking time,? the charge mode is forced regardless of the magnitude of the coil current (icoil) and set current (iref).) ? the coil current (icoil) and set current (ir ef) are compared in this blanking time. when (icoil LV8702V no.a2121-20/24 3) boost-up adjuster function during high-efficient drive, boost-up adjuster function de tects a possibility of step-out caused by such factors as abrupt load variation and then boosts up i out at once (boost-up process). you can set a level of boost-up by setting gst1 and gst2 pins. one way to set gst1 and gst2 is to increase boost-up level from minimum to maximum within the maximum load condition and select the optimum boost-up setting where motor rotates without stepping out. also, boost-up level varies depends on reference current defined by vref. therefore, you can increase load following capability by increasing vref voltage. the higher the boost-up level is, the more the ic become s tolerant for abrupt load variation. however, rotation stability may become poor (vibration and rotation fluctuatio n may occur) because excessi vely high boost-up level leads to rapid increase of i out at load variation. you may be able to improve poor rotation stability with high boost-up level by increasing high-efficient drive margin. gst1 gst2 setting increase of iout load following capability rotation stability l or open l or open boost-up leve l minimum {(vref/5)/rf resistance} 1/128 ordinary best h l or open boost-up level low {(vref/5)/rf resistance} 4/128 good better l or open h boost-up level high {(vref/5)/rf resistance} 16/128 better good h h boost-up level maximum {(vref/5)/rf resistance} 64/128 best ordinary 4) external component the resistance value of ra1, ra2 (control signal resistor s) is adjusted in such a way as to set the maximum swout output voltage during motor rotation to 12v in adin pin. preferably, resistance values of ra1 and ra2 are as high as possible to the ex tent that does not influence waveform. (recommendation for ra1: 15k , ra2: 100k ). in some motor where boost-up process occurs at a high speed rotation of 7000pps to 8000pps or higher (hb motor: half step excitation), you can suppress boost-up by lowering ra1. moreover, you can achieve high efficiency at lower speed of 1500pps or lower by increasing resistance for ra 1 (hb motor: half step excitation). although it depends on a usage motor, step-out is detectable at higher speed rotation by attaching smaller resistor for ra1. ra2 ra1 adin swout ca LV8702V no.a2121-21/24 5) drive status warning function dst1 and dst2 are open-drain output. the driving status can be monitored through a status of dst1 and dst2 pins. when step-out status is detected, dst1 is on for a period of 1 step. likewise, when small step-out margin status is detected, dst2 turns on for the period of 1 step. in the case of output short status or overheat status, dst1 and dst2 stay on until st = ?l?. step-out status and small step-out margin status are de tectable during high-efficient drive only. in some cases, step-out status may not be detected properly. hence, make sure to verify the operation with the usage application. if step-out or small step-out margin stat us occur frequently, make sure to set a large high-efficient drive margin or higher boost-up level. dst1 dst2 status off off normal status on off step-out status *1(this function is enabled only in high-efficient drive) off on small step-out margin status *2(this fu nction is enabled only in high-efficient drive) on on output short stat us or overheat status * 1: although it depends on a usage motor, step-out is detectable at higher speed rotation by attaching smaller resistor for ra1. * 2: if dst2 alone is turned on, boost-up processing is performed. 16. output short protection circuit output short protection circuit is included in this ic which sets an output to standby mode and turns on warning output. this protection circuit prevents ic destruction when the output is short due to power short or ground short. 1) operation overview when output short is detected, short detection circuit op erates. if the short status continues for the period of internal timer ( 2 s), the output of 1ch/ 2ch is turned off. if the short status exceeds the timer latch time ( 32 s) set in the internal timer, the output is turned on again and detects short status again. if short is detected again, all the output of 1ch/ 2ch are switched to standby mode and the status is kept. to cancel the standby status, set st = ?l?. 2) error status warning output pin (dst2, dst1) when the ic detects error status and protection circuit operates, dst2 pin and dst1 pin outputs the error status to cpu side. this pin is open-drain output. when error status is detected, dst2 and dst1 output turn on (dst2 = dst1 = ?l?). dst2/dst1 pins are turned on in the following statuses: error status dst2 dst1 short is detected in 1ch side. on on short is detected in 2ch side. on on when overheat is detected. on on LV8702V no.a2121-22/24 17. charge pump circuit when st pin is set to ?h?, charge pump circuit operates and vg pin volta ge increases from vm voltage to vm + vreg5 voltage. because the output is not turned on if vm+4v or more is not pressured, the voltage of the vg pin recommends the drive of the motor to put the time of tong or more, and to begin. fg. vg pin voltage 18. current save function when motor is stopped sst pin is the open-drain output. when step signal is not input for about 16ms, (min: 13ms, max: 23ms), sst pin detects that the rotation of the motor is stopped and sst pin is turned on. at this time, high-efficient drive function is turned off automatically and full current value is set for i out by vref pin. and then after signal is input to step pin, sst pin is turned off and high-efficient control function is enabled. in this driver, the circuit constituent is as follows. by decreasing vref voltage when the motor is stopped, i out current can be saved. however, this function is unusable when you rotate motor at which input cycle of step pulse signal is 16ms or longer. rref2 rref1 sst vref rsst motor stop sst output vref voltage "l" "l" time "hi-z" rotation motor stop 1) with step signal where rref1 = 30k , 2) without step signal where rref1 = 30k , rref2 = 68k , rref2 = 68k and rsst = 5k and rsst = 5k vref1 = 5v30k /(68k+30k ) 1.53v vref2 = 5v4.3k /(68k+4.3k ) 0.3v where vref1 = 1.53v, where vref2 = 0.3v i out = vref/5/0.22 1.39a i out = vref/5/0.22 0.27a tong st vm+vreg5 vm+4v vm vg pin voltage LV8702V no.a2121-23/24 example of application circuit +- m 5v gmg2 gmg1 logic input logic input clock input ca 47k 0.22 0.22 47k 47k 68k 30k 0.1 f 0.1 f 10 f 0.1 f ra1 ra2 logic input logic input short/step- out detection monitor as for rsst, refer to 18.current save function. gad fr step st rst adin md2 md1 vreg5 dst2 dst1 oe sst chop vref sgnd moni cp1 vm vg out1a out1a vm1 vm1 rf1 rf1 out1b out1b out2a out2a rf2 rf2 vm2 out2b out2b pgnd2 gst2 gst2 vm2 pgnd1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 LV8702V swout cp2 rsst vref 150pf + - make sure that adin is 12v or less since constant varies depends on user applications. adin = (vm+vd) ra1/(ra1+ra2) vd: voltage for diode ca: capacitor for filter calculation for each constant setting according to the above circuit diagram is as follows. 1) constant current (100%) setting 2) chopping frequency setting vref = 5v30k /(68k + 30k ) 1.53v fchop = ichop/(cchopvtchop2) when vref = 1.53v : =10 a/(150pf0.5v2) i out = vref/5/0.22 1.39a 66.7khz LV8702V ps no.a2121-24/24 sanyo semiconductor co.,ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. regarding monolithic semiconductors, if you should intend to use this ic continuously under high temperature, high current, high voltage, or drastic temperature change, even if it is used within the range of absolute maximum ratings or operating conditions, there is a possibility of decrease reliability. please contact us for a confirmation. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. it is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equ ipment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. this catalog provides information as of october, 2012. specifications and information herein are subject to change without notice. |
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