application note AN109 AN109-1 adding a manual reset to xicor cpu supervisors by applications staff, september 1998 introduction the xicor cpu supervisors provides a number of impor- tant system monitoring and reset functions that help insure high system reliability (see application note an108.) however, there are times when it is desired to also include a manual reset switch. this application note explores several different approaches. force the reset the first, simplest, solution is to add a debounced switch to the reset signal (see figure 1.) in this circuit, the open drain reset output of the supervisory eeprom is pulled high to give the normal, inactive reset signal to the microcontroller. the manual reset switch pulls down the reset signal, with the capacitor providing some debounce. figure 1. reset switch (active low reset) the main disadvantage to this circuit is that the length of the pulse is indeterminate, which might result in some problems with some controllers. a second problem with this solution is that it doesnt work well with an active high reset signal. in this case (see figure 2.), the reset out- put is pulled up, but is normally low. adding a switch to pull reset high results in contention in the output driver. it will work, but can put strain on the output buffer. figure 2. reset switch (active high reset) use low voltage reset a mechanism that works for both active high and active low reset makes use of the xicor cpu supervisor low voltage sense circuit. in this case, a switch and three diodes are added to the vcc line of the supervisor (see figure 3.) opening the switch drops the power to the cpu supervisor only, from above 4.55v to below 4.25 volts. as power to the vcc line drops below the trip point, the reset pin goes active, resetting the system. the supervisor then provides a clean reset signal and doesnt release the reset signal for 250ms (nominal) after the vcc supply returns. the reset output is pulled up to 5v providing either an active high or active low reset. cs si so sck micro controller supervisory eeprom reset rst vcc cs si so sck micro controller supervisory eeprom reset rst vcc
xicor application note AN109-2 AN109 figure 3. using the low votage reset use watchdog timer the built in watchdog timer can also be used to create a debounced manual switch. with the supervisory eeprom watchdog timer turned on, a switch can be added into the chip select line (see figure 4.) to control the reset signal reaching the cs pin. normally this signal restarts the watchdog timer, preventing a reset condition. when the reset switch is pressed, however, the chip select signal from the microcontroller is disconnected from the supervisor. this prohibits the timer from being restarted and the watchdog timer expires within a preset time period. when the watchdog period is set to 200 ms, the reset operation responds in a reasonable amount of time. also, since the watchdog timer reset action occurs only periodically, it effectively acts to debounce the reset switch. this circuit is limited by the need to use the 200ms setting, but the presence of the watchdog timer can pro- vide a manual reset input for systems that use a second watchdog timer in another part of the circuit for system management. more information additional information about the supervisory eeproms can be found on the xicor www site, the bbs, or through the xicor faxback system. internet access: www.xicor.com. bbs: 1-800-258-8864 (toll free) 1-408-943-0655 (international) 19.2k baud, no parity, 8 bit words, 1 stop bit, and no local echo faxback: 408-954-1627. cs si so sck micro controller supervisory eeprom reset rst vcc vcc reset figure 4. using the watchdog timer for debounced manual reset cs si so sck micro controller supervisory eeprom reset rst /rst vcc ce 200ms ce switch cs reset /reset open closed reset
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