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| MBF300 Solid State Fingerprint Sweep SensorTM Overview The Fujitsu MBF300 Solid-State Fingerprint Sweep Sensor is a direct contact, fingerprint acquisition device. It is a high performance, low power, low cost, capacitive sensor composed of a two-dimensional array of metal electrodes in the sensing array. Each metal electrode acts as one plate of a capacitor and the contacting finger acts as the second plate. A passivation layer on the device surface forms the dielectric between these two plates. Ridges and valleys on the finger yield varying capacitor values across the array, and the resulting varying discharge voltages are read to form an image of the fingerprint. The MBF300 sensor when combined with Sweep Sensor image capture software works by sliding your finger over the sensor surface. Rapid image capture software detects muliple fingerprint images and reconstructs the fingerprint minutia template. Packages The MBF300 is manufactured in standard CMOS technology. The 256 X 32 sensor array has a 50 m pitch and yields a 500-dpi image. The sensor surface is protected by a patented, ultra-hard, abrasion and chemical resistant coating. Features * Capacitive solid-state device * 1.28 cm x 0.16 cm sensor area * 256 x 32 sensor array * 2.8V to 5V operating range y r a in im l e r P Applications * Secure access for databases, networks, local storage * Portable fingerprint acquisition * Smart Cards * Identity verification for ATM transactions * Cellular phone-based security access * Access control and monitoring (home, auto, office, etc.) * 500-dpi resolution (50 m pitch) * Exceptionally hard protective coating * Integrated 8-bit analog to digital converter * One of three bus interfaces: 8-bit microprocessor bus interface Integrated USB Full-Speed Interface Integrated Serial Peripheral Interface * Standard CMOS technology * Low power, less than 70 mW operating at 5V MBF300 Table of Contents Chip Operation .....................................................................................................................................................................1 Block Diagram......................................................................................................................................................................1 Connection Diagram..............................................................................................................................................................2 Pin List................................................................................................................................................................................3 Pin Descriptions....................................................................................................................................................................4 Device Bus Operation.............................................................................................................................................................7 Microprocessor Bus Interface ............................................................................................................................................7 Serial Peripheral Bus Interface (SPI) Slave ................................................................................................................................8 SPI Bus Mode.................................................................................................................................................................8 SPI Slave Mode...............................................................................................................................................................8 Register Read Command in SPI Slave Mode ........................................................................................................................8 Register Write Command for SPI Slave Mode ......................................................................................................................8 USB Interface Mode, Using Internal ROM ................................................................................................................................8 Endpoint 0 ....................................................................................................................................................................8 Endpoint 1 ....................................................................................................................................................................8 Endpoint 2 ....................................................................................................................................................................8 USB Interface Mode, Using External ROM ...............................................................................................................................8 SPI Master Mode ............................................................................................................................................................9 Function Register Descriptions ...............................................................................................................................................9 Function Register Map...........................................................................................................................................................9 RAH 0x00 .....................................................................................................................................................................9 RAL 0x01....................................................................................................................................................................10 CAL 0x02 ....................................................................................................................................................................10 REH 0x03....................................................................................................................................................................10 REL 0x04 ....................................................................................................................................................................10 CEL 0x05 ....................................................................................................................................................................10 DTR 0x06....................................................................................................................................................................11 DCR 0x07....................................................................................................................................................................11 CTRLA 0x08 ...............................................................................................................................................................11 CRTLB 0x09................................................................................................................................................................13 CTRLC 0x0A ...............................................................................................................................................................14 SRA 0x0B....................................................................................................................................................................14 PGC 0x0C ...................................................................................................................................................................15 ICR 0x0D ....................................................................................................................................................................15 ISR 0x0E .....................................................................................................................................................................16 CIDH 0x10 ..................................................................................................................................................................16 Fujitsu Microelectronics Inc. Inc. Fujitsu Microelectronics America,America, -1 y r a in im l e r P Solid State Fingerprint Sweep SensorTM CIDL 0x11 .................................................................................................................................................................. 16 TST 0x12.................................................................................................................................................................... 16 Sensor Initialization............................................................................................................................................................ 17 Image Retrieval .................................................................................................................................................................. 17 Microprocessor Interface ............................................................................................................................................... 17 Get Row ............................................................................................................................................................... 17 Get Whole Image ................................................................................................................................................... 18 Get Sub-Image ...................................................................................................................................................... 19 Serial Peripheral Interface ...................................................................................................................................... 20 Get Image............................................................................................................................................................. 20 USB Interface........................................................................................................................................................ 21 Get Image............................................................................................................................................................. 21 Absolute Maximum Ratings ................................................................................................................................................. 22 Operating Range ................................................................................................................................................................ 22 DC Characteristics .............................................................................................................................................................. 22 Power Supply Consumption ................................................................................................................................................. 23 AC Characteristics .............................................................................................................................................................. 24 Microprocessor Bus Mode.............................................................................................................................................. 24 Read Cycle ............................................................................................................................................................ 24 Write Cycle ........................................................................................................................................................... 24 SPI Slave Mode...................................................................................................................................................... 25 SPI Master............................................................................................................................................................ 25 Timing Diagrams................................................................................................................................................................ 26 Physical Dimensions............................................................................................................................................................ 30 Array Orientation............................................................................................................................................................... 31 Appendix A ........................................................................................................................................................................ 32 Recommended Power and Ground Connections ................................................................................................................ 32 y r a in im l e r P 0 Fujitsu Microelectronics America,America, Inc. Fujitsu Microelectronics Inc. MBF300 Chip Operation The sensor array includes 256 columns and 32 rows of sensor plates. Associated with each column are two sample-and-hold circuits. A fingerprint image is sensed or captured one row at a time. This "row capture"occurs in two phases. In the first phase, the sensor plates of the selected row are pre-charged to the VDD voltage. During this pre-charge period, an internal signal enables the first set of sample-and-hold circuits to store the pre-charged plate voltages of the row. In the second phase, the row of sensor plates is discharged with a current source. The rate at which a cell is discharged is proportional to the"discharge current."After a period of time (referred to as the"discharge time"), an internal signal enables the second set of sample-and-hold circuits to store the final plate voltages. The difference between the precharged and discharged plate voltages is a measure of the capacitance of a sensor cell. After the row capture, the cells within the row are ready to be digitized. The sensitivity of the chip is adjusted by changing the discharge current and discharge time. The nominal value of the current source is controlled by an external resistor connected between the ISET pin and ground. The current source is controlled from the Discharge Current Register (DCR). The discharge time is controlled by the Discharge Time Register (DTR). Block Diagram P0 P1 D[7:0] A0 RD WR WAIT CS0 CS1 MOSI MISO DP DM EXTINT INTR TEST MODE1 MODE0 y r a in im l e r P DATA REGISTER INDEX REGISTER FUNCTION REGISTERS CONTROL SPI 256 X 32 SENSOR ARRAY SAMPLE AND HOLD A/D CONVERTER AIN ISET ANALOG USB MULTIVIBRATOR FSET XTAL OSC XTAL1 XTAL2 Fujitsu Microelectronics America, Inc. 1 Solid State Fingerprint Sweep SensorTM Connection Diagram MBF300-FPC PIN I/O FACING CONTACT PADS NC GND VSS3 VDD3 DP DM MODE0 MODE1 MISO MOSI CS0/SCS CS1/SCLK EXTINT WAIT INTR XTAL1 XTAL2 VDD2 VSS2 WR RD A0 D0 D1 D2 D3 VDD1 VSS1 D4 D5 D6 D7 P1 P0 TEST VDDA2 VSSA2 FSET AIN ISET GND VSSA1 VDDA1 NC NC 45 44 43 42 41 40 39 38 37 36 35 34 33 32 y r a in im l e r P 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 9 8 7 6 5 4 3 2 1 10 NOTE: NC (NO CONNECTION) 2 Fujitsu Microelectronics America, Inc. MBF300 Pin List Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 Name NC NC VDDA1 VSSA VSSA ISET AIN FSET VSSA2 VDDA2 TEST P0 P1 D7 D6 D5 D4 VSS1 VDD1 D3 D2 D1 D0 A0 RD WR VSS2 VDD2 XTAL2 XTAL1 INTR WAIT EXTINT CS1/SCLK CS0/SCS MOSI MISO MODE1 MODE0 DM DP VDD3 VDD VSSA NC PWR GND GND O I O GND PWR I O O I/O I/O I/O I/O 8mA 8mA 8mA 8mA 8mA 8mA 4mA 4mA 4mA 4mA 4mA Type IOL (5.0 V) IOH (5.0 V) Description No Connect No Connect Analog Power Supply Analog Ground Analog Ground Sets Reference Current Analog Input Sets Internal Multi-vibrator Frequency Analog Ground Analog Power Supply Test Mode Enable Output Port 0 Output Port 1 Data Bit 7 Data Bit 6 Data Bit 5 Data Bit 4 Digital Ground Digital Power Supply GND I/O I/O I/O I/O I I I PWR GND O I PWR O O I y r a in im l e r P 8mA 8mA 8mA 8mA 4mA 4mA 4mA 4mA 8mA 8mA 4mA 4mA 8mA 8mA 8mA 8mA 4mA 4mA Data Bit 3 Data Bit 2 Data Bit 1 Data Bit 0 Address Input Read Enable, Active Low Write Enable, Active Low Digital Ground Digital Power Supply Internal Oscillator Output Internal Oscillator Input Interrupt Output, Active Low Wait, Active Low External Interrupt Input I/O I/O I/O I/O I I I/O I/O PWR PWR GND Chip Select, Active High Chip Select, Active Low SPI Master Output / Slave Input SPI Master Input / Slave Output Mode Select 1 Mode Select 0 USB DUSB D+ Digital Power Supply Digital Power Supply Analog Ground No Connect Fujitsu Microelectronics America, Inc. 3 Solid State Fingerprint Sweep SensorTM Pin Descriptions No Connect (Pins 1, 2, and 45) Unconnected pins. VDDA1, VDDA2 (Pins 3 and 10) Power Supply to the analog section of the sensor. VDDA1 powers the array, row drivers, column receivers, A/D converter, and sample/hold amplifier. VDDA2 powers the multi-vibrator and bias circuits. VSSA1, VSSA2 (Pins 4, 5, 9, and 44) Ground for the analog section of the sensor. VSSA1 is the ground return for the array, row drivers, column receivers, A/D converter, and sample hold amplifier. VSSA2 is the ground return for the multi-vibrator and bias circuits. VDD1, VDD2, VDD3 ( Pins 19, 28, and 42-43) Power supply to the digital logic and I/O drivers. VDD2 powers the core digital logic, oscillators, phase-locked loops, and digital inputs. VDD1 and VDD3 supply power to the digital output circuits and USB transceivers. VSS1, VSS2, VSS3 (Pins 18 and 27) Ground for the digital logic and I/O drivers. VSS2 is the ground connection for the core digital logic, oscillators, phase-locked loops, and digital inputs. VSS1 and VSS3 are the ground connections for the digital outputs and USB transceivers. ISET (Pin 6) Connect a 200k ohm resistor between ISET and analog ground VSSA1 to set the internal reference current. The discharge current is a scalar function of the internal reference current. AIN (Pin 7) Alternate analog input to the A/D converter. Set the AINSEL bit in register CTRLA to select AIN as the input to the A/D converter. Pull this pin to ground, preferably with a resistor. FSET (Pin 8) Connect a resistor between FSET and ground to set the internal multi-vibrator and automatic finger detection frequency. Use a 56k ohm resistor for standard 12 MHz (20%) multi-vibrator operation and 120KHz (20%) automatic finger detection sampling rate. y r a in im l e r P XTAL1 (Pin 30) Input to the internal oscillator. To use the internal oscillator, connect a crystal circuit to this pin. If an external oscillator is used, connect its output to this pin. XTAL2 (Pin 29) Output from the internal oscillator. To use the internal oscillator, connect a crystal circuit to this pin. If an external oscillator is used, leave this pin unconnected. D[7:0] (Pins 14-17, 20-23) Bi-directional data bus. D[7:0] have weak latches that hold the bus's state when not being driven. These pins may be left unconnected in SPI or USB mode. 4 Fujitsu Microelectronics America, Inc. MBF300 A0 (Pin 24) Address input. Drive A0 low to select the address index register. Drive A0 high to select the data buffer. A0 has a weak latch that holds the pin state when not being driven. This pin may be left unconnected in SPI or USB mode. RD (Pin 25) Read enable, active low. To read from the chip, drive RD low while WR is high and the chip is selected. RD has an internal, weak pull-up resistor and may be left unconnected in SPI or USB mode. WR (Pin 26) Write enable, active low. To write to the chip, drive WR low while RD is high and the chip is selected. WR has an internal, weak pull-up resistor and may be left unconnected in SPI or USB mode. CS0 / SCS (Pin 35) Chip select, active low. The CS0/SCS pin has a weak latch that holds the pin's state when not being driven. CS0/SCS may be left unconnected in USB mode if not using an external serial ROM. The function of the CS0/SCS pin depends on the MODE1 and MODE0 pins. MODE[1:0] = 00b (Microprocessor Bus Interface Mode) MODE[1:0] = 01b (SPI Slave Mode) CS0/SCS functions as an active-low chip select input. Drive CS0/SCS low while CS1 is high to select the chip. CS0/SCS functions as an active-low slave chip select input. Connect a pull-up resistor between CS0/SCS and VDD. MODE[1:0] = 10b (USB Interface Mode, Using Internal ROM) CS0/SCS has no function. MODE[1:0] = 11b (USB Interface Mode, Using External ROM) CS0/SCS functions as the master chip select output, active low to the slave serial ROM chip select. Connect a pullup resistor between CS0/SCS and VDD. CS1 / SCLK (Pin 34) Chip select, active high. The CS1/SCLK pin has a weak latch that holds the pin's state when not being driven. CS1/SCLK may be left unconnected in USB mode if not using an external serial ROM. The function of this pin depends on the MODE1 and MODE0 pins. MODE[1:0] = 00b (Microprocessor Bus Interface Mode) MODE[1:0] = 01b (SPI Slave Mode) CS1/SCLK functions as the slave serial clock input. CS1/SCLK functions as an active-high chip select input. Drive CS1/SCLK high while CS0-/CSC- is low to select the chip. y r a in im l e r P MODE[1:0] = 10b (USB Interface Mode, Using Internal ROM) CS1/SCLK has no function. MODE[1:0] = 11b (USB Interface Mode, Using External ROM) CS1/SCLK functions as the master serial clock output to the slave serial ROM clock input. Connect a pull-up resistor between CS1/SCLK and VDD. EXTINT (Pin 33) External Interrupt input. This pin can be programmed to be edge or level sensitive, active-high or active-low. EXTINT has a weak pull-up and may be left unconnected in MCU, SPI, or USB mode. Fujitsu Microelectronics America, Inc. 5 Solid State Fingerprint Sweep SensorTM INTR (Pin 31) Interrupt output, active low. INTR is high impedance when it is not active and is driven low when an enabled interrupt event occurs. INTR can be enabled if the sensor is in MCU or SPI mode. In USB mode leave this pin unconnected. WAIT (Pin 32) Wait output, active low. WAIT is driven low when active and high-impedance when not active. WAIT goes low if the A/D converter is read while an A/D conversion is in progress. WAIT will remain low until the A/D conversion is completed. MOSI (Pin 36) SPI Master Output/Slave input. The MOSI pin has a weak latch that holds the pin's state when not being driven. MOSI may be left unconnected in MCU mode or USB mode if not using an external serial ROM. The function of this pin depends on the MODE1 and MODE0 pins. MODE[1:0] = 00b (Microprocessor Bus Interface Mode) MOSI has no function. MODE[1:0] = 01b (SPI Slave Mode) MOSI functions as the slave serial input. MOSI has no function. MODE[1:0] = 10b (USB Interface Mode, Using Internal ROM) MODE[1:0] = 11b (USB Interface Mode, Using External ROM) MOSI functions as the master serial data output to the slave serial ROM data input. Unlike standard SPI, MOSI is actively driven high and low when transmitting data and is high impedance when idle. Connect a pull-up resistor between MOSI and VDD to pull MOSI high when idle. MISO (Pin 37) SPI Master Input/Slave Output. The MISO pin has a weak latch that holds the pin's state when not being driven. MISO may be left unconnected in MCU mode or USB mode if not using an external serial ROM. The function of this pin depends on the MODE1 and MODE0 pins. MODE[1:0] = 00b (Microprocessor Bus Interface Mode) MISO has no function. MODE[1:0] = 01b (SPI Slave Mode) y r a in im l e r P MISO functions as the slave serial data output. Unlike standard SPI, the MISO connection is actively driven high and low when transmitting data and is high impedance when idle. Connect a pull-up resistor between MISO and VDD to pull MISO high when idle. MODE1/MODE0 = 10b (USB Interface Mode, Using Internal ROM) MISO has no function. MODE1/MODE0 = 11b (USB Interface Mode, Using External ROM) MISO functions as the master serial data input from the slave serial ROM data output. P0 (Pin 12) Port Output 0. This output is controlled by bit 0 of the CTRLC register. P1 (Pin 13) Port Output 1. This output is controlled by bit 1 of the CTRLC register. 6 Fujitsu Microelectronics America, Inc. MBF300 DP (Pin 41) USB D+ data line. In USB mode, connect a 1.5k ohm resistor between DP and VDD3, which must be between 3.3V and 3.6V in this mode. Use a 43 ohm series resistor. In MCU or SPI mode, either pull-up this pin with a resistor or tie it to ground. DM (Pin 40) USB D- data line. Use 43 ohm series resistor. In MCU or SPI mode, either pull-up this pin with a resistor or tie it to ground. MODE[1:0] (Pins 38 and 39) Mode Select pins. MODE[1:0] select one of four operating modes. MODE[1:0] 00b 01b 10b 11b Description Microprocessor Bus Mode SPI Bus Mode USB Mode, Using Internal ROM USB Mode, Using External ROM TEST (Pin 11) Test Mode Enable. It is intended for factory use only. Connect this pin to VSS. Device Bus Operation Microprocessor Bus Interface The microprocessor bus interface mode uses the following pins: D[7:0], A0, RD, WR, CS0, CS1, EXTINT, INTR, and WAIT. Either the internal multi-vibrator or the XTAL1/XTAL2 oscillator can be selected to provide the clock to the chip. The SPI and USB interfaces are disabled. The fingerprint sensor chip uses an indexed addressing scheme to access its function registers. The chip has eight data lines (D[7:0]) and one address line (A0). The address line selects between the index register and the data register. Drive A0 low to select the index register. Drive A0 high to access the function register selected by the index register. The index register retains its value until it is rewritten or the chip is reset. y r a in im l e r P RD X X H L H L H WR X X H H L H L Mode De-selected De-selected Standby Read Index Register Write Index Register Read Data Register Write Data Register The chip has four control inputs: CS0, CS1, RD, and WR. Drive CS0 low and CS1 high to select the chip. Data is latched on the rising edge of WR-. The chip has two status lines: INTR and WAIT. The INTR signal is asserted when an interrupt event occurs. The WAIT signal goes low when the A/D converter is read while an A/D conversion is in progress. The WAIT signal will be high impedance when the A/D conversion is completed. Both the WAIT and INTR outputs are high impedance when they are not active. As a result, they can be activelow WIRE-ORed in conjunction with other interrupts or wait signals. The SPI and USB interfaces are disabled when the microprocessor bus interface is selected. A truth table for the microprocessor bus interface is shown below: Truth Table for the Microprocessor Bus Interface CS0 H X L L L L L CS1 X L H H H H H A0 X X X L L H H Data Lines High Impedance High Impedance High Impedance Output Input Output Input Fujitsu Microelectronics America, Inc. 7 Solid State Fingerprint Sweep SensorTM Serial Peripheral Bus Interface (SPI) Slave SPI Bus Mode SPI (Slave) bus mode uses the following pins: SCLK, SCS, MOSI, MISO, and EXTINT. Either the internal multivibrator or the XTAL1/XTAL2 oscillator can be selected to provide the clock to the chip. The microprocessor bus and USB interface are disabled. USB Interface Mode, Using Internal ROM This USB mode uses the following pins: DP, DM, EXTINT, XTAL1, and XTAL2. XTAL1 must be driven from a 12 MHz source or XTAL1 and XTAL2 must be connected to a 12 MHz crystal circuit. The internal 12 MHz multivibrator, the microprocessor bus, and SPI interface are disabled. The internal USB descriptor ROM will be accessed in response to a USB GET_DESCRIPTOR command. The sensor's USB interface uses three endpoints: SPI Slave Mode In SPI Slave Mode, the sensor can operate in either SPI mode (0, 0) where CPOL = 0 and CPHA = 0 or SPI mode (1, 1) where CPOL = 1 and CPHA = 1. The SPI Master may clock in commands and clock out data up to 12 Mbits per second. The SPI Master can write and read the registers of the sensor even when the internal 12 MHz multivibrator or XTAL1/XTAL2 oscillator is halted. * MOSI bits are sampled on the rising edge of SCK * MISO bits change on the falling edge of SCK * SCK can be idle in either a high or low state Endpoint 0 Endpoint 0 is a control endpoint used for device enumeration and configuration. The sensor function registers are written and read using control transfers of vendor specific commands to endpoint 0. * The most significant bits are shifted out first Register Read Command in SPI Slave Mode The Register Read command includes a command byte and address byte. The command sequence begins when the SPI master drives SCS low and sends the Read Command byte (encoded as 0x03) on the MOSI pin. Following the command byte, the master sends the address byte, which is the index to the register to be read. After receiving the least significant bit (LSB) of the address byte, the SPI slave sensor sends the contents of the selected register on the MISO pin. Finally, the master drives SCS high after it has sampled the LSB of the data byte. When reading the A/D converter, the Master may keep SCS low to read consecutive pixels up to the end of the current row. A new Register Read command must be issued to read the next row. The SPI Master must drive SCS high before beginning another command. y r a in im l e r P Endpoint 1 Endpoint 2 Endpoint 1 is a bulk-in endpoint specifically for reading the CTRLA register, which is the output buffer of the A/D converter. Data is transmitted in 64-byte packets except for the last packet of a GETROW operation which may be 64-bytes or less, depending on the row length. Endpoint 2 is an interrupt endpoint. In the event of an interrupt, the contents of the ISR (Interrupt Status Register) are transfered to endpoint 2. USB Interface Mode, Using External ROM This USB mode the uses following pins: DP, DM, SCLK, SCS, MOSI, MISO, EXTINT, XTAL1, and XTAL2. XTAL1 must be driven from a 12 MHz source or a 12 MHz crystal circuit must be connected to XTAL1 and XTAL2. The internal 12 MHz multivibrator and the microprocessor bus are disabled. The SPI interface is enabled as an SPI Master. The external SPI serial ROM will be accessed in response to a USB GET_DESCRIPTOR command. The internal USB descriptor ROM is disabled. This mode allows an external serial ROM to override the internal descriptor ROM. Note: When the MBF300 is directly connected to USB in either of the modes above, the VDD and VDDA pins must be powered between 3.3V and 3.6V so that the MBF300 DP and DM pins do not drive the USB beyond 3.6V . Register Write Command for SPI Slave Mode The Register Write command includes a command byte and address byte followed by the data to be written. The command sequence begins when the SPI Master drives SCS low and sends the Write Command byte (encoded as 0x02) on the MOSI pin. Then the master sends the address byte, which is the index to the register to be written. Finally, the master sends the data byte and thereafter drives SCS high. 8 Fujitsu Microelectronics America, Inc. MBF300 SPI Master Mode In SPI Master Mode the sensor operates in SPI mode (1,1) where CPOL = 1, and CPHA = 1. SCK is limited to 1 MHz. * MOSI bits change on the falling edge of SCK * MISO bits are sampled on the rising edge of SCK * SCK is idle in the high state * The most significant bits are shifted out first Function Register Descriptions The function registers are accessed by indexed addressing. Write the index register to select a function register. Read or write the data register to access the contents of the function register. All registers can be read and written except as noted in the following descriptions. Function Register Map Index 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x10 0x11 0x12 Name RAH RAL Description Row Address, High Row Address, Low Read/Write Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R/W R/W R/W R R R/W CAL REH REL DTR DCR CTRLA CTRLB CTRLC SRA PGC ICR ISR CIDH CIDL TST y r a in im l e r P Column Address, Low Row Address End, High Row Address End, Low CEL Column Address End, Low Discharge Time Register Discharge Current Register Control Register A Control Register B Control Register C Status Register A Interrupt Control Register Interrupt Status Register Chip Identification, High Chip Identification, Low Test Mode Register Programmable Gain Control Register Note: In the following descriptions,"sub-image"means a rectangular region of the sensor array, up to and including the entire array. RAH 0x00 Row Address Register High. Reset State: 0x00 This register holds the high order bit of the address of the first row of a sub-image. Bit Number [7:1] 0 Bit Name RA[8] Function Reserved. Write 0 to these bits. Most Significant Bit of Row Address Register Fujitsu Microelectronics America, Inc. 9 Solid State Fingerprint Sweep SensorTM RAL 0x01 Row Address Register Low. Reset State: 0x00 This register holds the low order byte of the address of the first row of a sub-image. Bit Number [7:0] Bit Name RA[7:0] Function Low eight bits of Row Address Register CAL 0x02 Column Address Register. Reset State: 0x00 This register holds the address of the first column of a sub-image. Bit Number [7:0] Bit Name CA[7:0] Function REH 0x03 Row Address End Register High. Reset State: 0x00 This register holds the most significant bit of the address of the last row of a sub-image. Bit Number [7:1] 0 Bit Name REND[8] REL 0x04 Row Address End Register Low. Reset State: 0x00 This register holds the least significant byte of the address of the last row of a sub-image. Bit Number [7:0] Bit Name REND[7:0] y r a in im l e r P Function Function Function Column Address Register Column Address Register Reserved. Write 0 to these bits. Most Significant Bit of Row Address Register Low eight bits of Row Address Register CEL 0x05 Column Address End Register. Reset State: 0x00 This register holds the address of the last column of a sub-image. Bit Number [7:0] Bit Name CEND[7:0] 10 Fujitsu Microelectronics America, Inc. MBF300 DTR 0x06 Discharge Time Register Reset State: 0x00 Bit Number [7] [6:0] Bit Name DT[6:0] Function Reserved. Write 0 to these bits. Sets the discharge time in oscillator clock periods. DCR 0x07 Discharge Current Register Reset State: 0x00 Bit Number [7:5] [4:0] Bit Name DC[4:0] Function Reserved. Write 0 to these bits. Sets the discharge current rate. CTRLA 0x08 Control Register A. Reset State: 0x00 Write this register to initiate image conversion. Read this register to read the A/D converter. Bit Number 7 6 5 4 3 2 1 0 Bit Name - AINSEL GETSUB GETIMG GETROW The GETSUB, GETIMG, and GETROW bits select an image access mode and initiate an A/D conversion sequence. The AINSEL bit selects the input source to the A/D converter. Set the GETSUB bit to initiate the capture of a rectangular sub-image defined by the RAH, RAL, CAL, REH, REL, and CEL registers. In CPU or SPI mode, the sub-image can be an arbitrary rectangle ranging from a single pixel to the entire array. In USB mode, the number of columns in the sub-image must be an integral multiple of 64. Set the GETIMG bit to initiate the capture of a whole image starting from row zero and column zero through row 299 and column 255, regardless of the RAH, RAL, CAL, REH, REL, and CEL registers. Set the GETROW bit to initiate the capture of a row specified by the RAH and RAL registers. Writing a 1 to any of GETSUB, GETIMG, or GETROW abandons the current image access operation and restarts at the beginning of the sub-image, image, or row. Set at most one of these three bits. If more than one these three bits are set, image conversion will not start. y r a in im l e r P Function Reserved. Write 0 to this bit. Reserved. Write 0 to this bit. Reserved. Write 0 to this bit. Reserved. Write 0 to this bit. 0=Select Array for Conversion 1=Select External Analog Input Pin and Start Conversion Initiates Auto-increment for sub-image Initiates Auto-increment for whole image Initiates Auto-increment for selected row Fujitsu Microelectronics America, Inc. 11 Solid State Fingerprint Sweep SensorTM Setting the GETROW bit causes the following events to happen: * Row address loaded with contents of RAH and RAL register. * Column address resets to zero * Row capture automatically starts * Analog to digital conversion of first pixel automatically starts Setting the GETIMG bit causes the following events to happen: * Row address resets to zero * Column address resets to zero * Row capture automatically starts * Analog to digital conversion of first pixel automatically starts Setting the GETSUB bit causes the following events to happen: * Row address loaded with contents of RAH and RAL register * Column address loaded with contents of CAL * Row capture automatically starts * Analog to digital conversion of first pixel automatically starts Set the AINSEL bit along with one of the other three bits to begin the analog to digital conversion of the voltage on the AIN pin instead of the sensor array. Writing 0 to the CTRLA register has no effect other than clearing AINSEL; the current image access operation is not abandoned. Read CTRLA for the result of the A/D conversion. The rising edge of RD causes the next A/D conversion to start. Parameter Description Max Units Clock Cycles Clock Cycles Rising Edge of WR to First Data Valid Rising Edge of RD to Next Data Valid y r a in im l e r P 28 + DT[6:0] 6 Note: DT[6:0] refers to the contents of the Discharge Time Register. 12 Fujitsu Microelectronics America, Inc. MBF300 CRTLB 0x09 Control Register B. Reset State: CTRLB[7:6] = state of MODE[1:0]. CTRLB[5] = 1. CTRLB [4:0] = 0, Chip is disabled, oscillator is stopped. Bit Number [7:6] Bit Name MODE[1:0] Function Reflects the state of the MODE[1:0] pins. These bits are read-only. Writing to these bits has no effect. Write 0 to these bits. This is a read-only bit that indicates the status of the A/D Converter. 0 = A/D Conversion is in progress. 1 = A/D Converter is idle. Writing this bit has no effect. Write 0 to this bit. Reserved. Write 0 to this bit. Reserved, this bit has no effect. 0 = Column and row addresses do not automatically increment after the A/D converter is read. 1 = Column addresses increment and another A/D conversion is initiated after the A/D converter is read. The row address increments at the end of each column. In USB mode this bit has no function. In CPU and SPI mode this bit selects the clock source for the digital logic. 0 = Selects the internal 12 MHz multi-vibrator. 1 = Selects the XTAL1 pin. 0 = Place the sensor array, digital, and analog block into low-power state (12 MHz clock is halted, A/D Converter is shut down). 1= Enable the sensor array, digital, and analog blocks (12 MHz clock and A/D Converter are enabled). 5 RDY 4 3 2 AUTOINCEN 1 XTALSEL 0 ENABLE y r a in im l e r P Fujitsu Microelectronics America, Inc. 13 Solid State Fingerprint Sweep SensorTM CTRLC 0x0A Control Register C. This register controls the behavior of general output port pins P0 and P1. Reset State: 0x00 Bit Number Bit Name Function Programs the toggle rate of the P1 pin. If PT1[2:0] = 000, then the P1 pin follows the state of the P1 bit. Otherwise PT1[2:0] selects the clock divisor to generate a square wave on the P1 pin. 000 = P1 pin follows state of bit P1. 001 = clock divided by 224. 010 = clock divided by 223. 011 = clock divided by 222. 100 = clock divided by 221. 101 = Reserved. 110 = Reserved. 111 = Reserved. Programs the toggle rate of the P0 pin. If PT0[2:0] = 000, then the P0 pin follows the state of the P0 bit. Otherwise PT0[2:0] selects the clock divisor to generate a square wave on the P0 pin. 000 = P0 pin follows state of bit P0. 001 = clock divided by 224. 010 = clock divided by 223. 011 = clock divided by 222. 100 = clock divided by 221. 101 = Reserved. 110 = Reserved. 111 = Reserved. [7:5] PT1[2:0] [4:2] PT0[2:0] 1 P1 General Purpose Output Port. When PT1[2:0] bits are 000, this bit controls the P1 pin. 0 = P1 pin low. 1 = P1 pin high. General Purpose Output Port. When PT0[2:0] bits are 000, this bit controls the P0 pin. 0 = P0 pin low. 1 = P0 pin high. 0 P0 SRA 0x0B Status Register A. Read Only. This register shadows the state of CTRLA. Reset State: 0x00 Bit Number 7 6 5 4 3 2 1 0 Bit Name AINSEL GETSUB GETIMG GETROW Reserved. Returns 0. Reserved. Returns 0. Reserved. Returns 0. Reserved. Returns 0. y r a in im l e r P Function This bit is set or cleared when the AINSEL bit (CTRLA bit 3) is set or cleared by software. This bit is set when the GETSUB bit (CTRLA bit 2) is set by software. This bit is cleared after the last byte is read. This bit is set when the GETIMG bit (CTRLA bit 1) is set by software. This bit is cleared after the last byte is read. This bit is set when the GETROW bit (CTRLA bit 0) is set by software. This bit is cleared after the last byte is read. 14 Fujitsu Microelectronics America, Inc. MBF300 PGC 0x0C Programmable Gain Control Register. Reset State: 0x00 Bit Number [7:4] Bit Name Reserved. Write 0 to these bits. Returns 0 when read. Sets the gain of the amplifier. 0000 = 1.0 (default) 0001 = 0.25 0010 = 0.50 0011 = 0.75 0100 = 1.0 0101 = 1.25 0110 = 1.50 0111 = 1.75 1000 = 4.0 1001 = 1.0 1010 = 2.0 1011 = 3.0 1100 = 4.0 1101 = 5.0 1110 = 6.0 1111 = 7.0 Function [3:0] PG[3:0] ICR 0x0D Interrupt Control Register. Reset State 0x00. This register controls the behavior of the two interrupt sources of the fingerprint sensor. Interrupt request 0 corresponds to the finger detect interrupt. Interrupt request 1 corresponds to the external interrupt pin EXTINT. Set bits IE[1:0] to enable the corresponding interrupt. Disabling an interrupt prevents the interrupt event from causing the chip to assert INTR or to send a packet on USB endpoint 2. However, the interrupt event is not prevented from setting its corresponding bit in the ISR register. Set bits IM[1:0] to prevent an interrupt event from setting the corresponding bit in the ISR. Setting or clearing IM[1:0] will not clear ISR bits IR[1:0]. Set bits IT[1:0] to program the interrupts as edge or level sensitive. If IT1 is programmed as edge triggered, then IR1 (interrupt request 1) will be set by the falling edge of EXTINT. Bit Number 7 6 5 4 3 2 1 0 Bit Name IP1 IT1 IM1 IE1 Function 0=EXTINT Interrupt Polarity is Falling Edge or Active Low 1=EXTINT Interrupt Polarity is Rising Edge or Active High This bit is reserved. 0=EXTINT Interrupt is Edge Triggered 1=EXTINT Interrupt is Level Triggered This bit is reserved. 0=EXTINT Interrupt Not Masked 1=EXTINT Interrupt Masked This bit is reserved. 0=EXTINT Interrupt Disabled 1=EXTINT Interrupt Enabled This bit is reserved. Fujitsu Microelectronics America, Inc. y r a in im l e r P 15 Solid State Fingerprint Sweep SensorTM ISR 0x0E Interrupt Status Register. Reset State ISR[7:2] = 0. ISR[1:0] = X. State is indeterminate after reset. Read this register to determine source(s) of interrupt(s). Write a 1 to IR[1:0] to acknowledge and clear the corresponding interrupt bit. Bit Number [7:4] 3 2 1 0 Bit Name IS1 IR1 Function Reserved. Write 0 to these bits. Returns 0 when read. Reflects the state of the EXTINT Pin. Write 0 to this bit. Reserved. Write 0 to this bit. EXTINT Interrupt Request Pending. Reserved, returns 0 when read. CIDH 0x10 Bit Name CIDH[7:0] Chip Identification Register High. This register holds the high order byte of the chip identification word. Bit Number [7:0] CIDL 0x11 Bit Name CIDL[7:0] Chip Identification Register Low. This register holds the low order byte of the chip identification word. Bit Number [7:0] Function TST 0x12 Test Mode Register. Reserved for factory use only. Reset State 0x00. Bit Number [7:0] Bit Name TST[7:0] y r a in im l e r P Function Returns 0x20 when read. Function Reserved. Write only 0 to these bits. The return value depends on the Revision of the chip. 16 Fujitsu Microelectronics America, Inc. MBF300 Sensor Initialization The sensor should be enabled and its image parameters adjusted before beginning a GETIMG, GETROW, or GETSUB operation. Enable ADC Image Retrieval Microprocessor Interface Get Row First load the RAH and RAL registers with the address of the row to be fetched. Then write the CTRLA register to initiate a GETROW operation. Finally, read the CTRLA register 256 times to retrieve the row data. If using an external clock, then set bit 1 also. Setup Row Address (MCU Mode) Write CTRLB with bits 2 and 0 set. Wait 30 S. Other registers (DTR and DCR for example) can be initialized during this time. Write RAH. Set Row Address High Order bit. Sensor Enabled. Adjust Parameters Write DTR. Write DCR. y r a in im l e r P No Write RAL. Set Row Address Low Order byte. Row Selected. GetRow (MCU Mode) Write CTRLA with 0x01. Wait Row Capture Time. Read CTRLA. Write PGC. Wait A/D Conversion Time. Parameters Adjusted. Last Cell of Row was Read? Yes Row Captured. Fujitsu Microelectronics America, Inc. 17 Solid State Fingerprint Sweep SensorTM Get Whole Image No row or column registers need to be loaded prior to starting a GETIMG operation. The sensor will automatically begin A/D conversion at row zero, column zero. Image Capture (MCU Mode) Write CTRLA with 0x02. Wait Row Capture Time. y r a in im l e r P No Wait A/D Conversion Time. No Last Cell of Row was Read? Yes Last Cell of Image was Read? Yes Image Captured. Read CTRLA. 18 Fujitsu Microelectronics America, Inc. MBF300 Get Sub-Image First, load the RAH, RAL, and CAL registers with the starting row and column address of the sensor sub-region. Then load registers REH, REL, and CEL with the ending row and column address of the sensor sub-region. Write the CTRLA register to initiate a GETSUB operation. Finally, read CTRLA register until the sub-image has been retrieved. The RAH, RAL, CAL, REH, REL, and CEL registers do not have to be loaded before each GETIMG operation unless a different sensor sub0region is to be captured. Setup Sub Region (MCU Mode) Get Sub Image (MCU Mode) Write RAH. Set Starting Row Address, High Order bit. Write CTRLA with 0x04. Write RAL. Write CAL. Write REH. Write REL. Write CEL. Sub Region Selected. y r a in im l e r P Set Starting Column Address. Set Ending Row Address, High Order bit. No No Set Starting Row Address, Low Order byte. Wait Row Capture Time. Read CTRLA. Wait A/D Conversion Time. Set Ending Row Address, Low Order byte. Last Cell of Row was Read? Set Ending Column Address. Yes Last Cell of Image was Read? Yes Image Captured. Fujitsu Microelectronics America, Inc. 19 Solid State Fingerprint Sweep SensorTM Serial Peripheral Interface The"Get Image,""Get Sub-Image,"and"Get Row"operations are initiated by writing the same registers as described in the microprocessor interface, except that the commands are written to the MOSI pin and the data is read back on the MISO pin. However, in SPI mode, an image or sub-image cannot be retrieved by issuing a single Register Read Command and shifting in the entire image; a separate Register Read Command must be issued prior to reading each row. Get Image Image Capture (SPI Mode) Drive SCS- Low. Send Write Opcode. Send CTRLA Address. Send Data 0x02. Drive SCS- High. y r a in im l e r P Wait Row Capture Time. Drive SCS- Low. Send Read Opcode. Send CTRLA Address. Read Data. No No Converted Last Cell of Row? Yes Drive SCS- High. Converted Last Cell of Image? Yes Image Captured. 20 Fujitsu Microelectronics America, Inc. MBF300 USB Interface The"Get Image,""Get Sub-Image,"and"Get Row"operations are initiated by writing the same registers as described in the microprocessor interface, except that the registers are written and read on endpoint 0 and the image data is read from endpoint 1. Get Image Image Capture (USB Mode) At Endpoint 0, Write CTRLA with 0x02. y r a in im l e r P No Final packet of Image was Read? Yes Image Captured. From Endpoint 1, Read 64-byte packet. Fujitsu Microelectronics America, Inc. 21 Solid State Fingerprint Sweep SensorTM Absolute Maximum Ratings Symbol VDD VIN, VOUT IOUT TSTG Power Supply Voltage Voltage on Any Pin Relative to VSS Output Current per I/O Storage Temperature Rating Value +7.0 -0.5 to +7.0 8.0 -65 to +150 Unit V V mA C Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. Operating Range Symbol VDD TA Supply Voltage Ambient Temperature Description Min 2.8 Max 5.5 3.6 60 Unit V V C DC Characteristics (VDD=5.0V) Symbol VIL VIH VOL VOH ILI ILO Description Input LOW Voltage Input HIGH Voltage Output LOW Voltage Output HIGH Voltage Input Leakage Current Output Leakage Current (VDD=3.3V) Symbol VIL VIH VOL VOH ILI ILO Description Input LOW Voltage Input HIGH Voltage Output LOW Voltage Output HIGH Voltage Input Leakage Current Output Leakage Current y r a in im l e r P USB Mode 3.3 0 Test Conditions VDO = 4.5V - VDD = MIN, IOL = 8 mA VDD = MIN, IOH = -4 mA VDD = MAX, VIN = VSS to VDD VDD = MAX, VOUT = VSS to VDD, CE0- = VIH or CE1 = VIL Test Conditions VDD = 3.0V VDD = 3.6V, IOL = 4 mA VDD = 3.0V, IOH = -2 mA VDD = 3.6V VIN = VSS to VDD VDD = 3.6V, VOUT = VSS to VDD, CE0- = VIH or CE1 = VIL Min -0.5 2.0 2.4 -5.0 -5.0 Max 0.8 VDD 0.4 5.0 5.0 Units V V V V A A Min -0.5 2.0 2.4 -5.0 -5.0 Max 0.6 VDD 0.4 5.0 5.0 Units V V V V A A 22 Fujitsu Microelectronics America, Inc. MBF300 Power Supply Consumption Symbol Description Test Conditions Typ Max Units (Microprocessor Mode, VDD=5.0V fOSC = 20MHz) IDD IDDSB IDDPDF IDDPD IDDA IDDASB IDDAPDF IDDAPD Digital Current, Dynamic Digital Current, Standby Digital Current, Power Down with Auto Finger Detection Enabled Digital Current, Power Down Analog Current, Dynamic Analog Current, Standby Analog Current, Power Down with Auto Finger Detection Enabled Analog Current, Power Down TBD TBD TBD TBD TBD TBD TBD TBD 5 1 10 10 20 12 200 10 mA mA A A mA mA A A (SPI Slave Mode, VDD=5.0V) IDD IDDSB Digital Current, Dynamic Digital Current, Standby TBD 5 1 10 10 20 12 200 10 mA mA A A mA mA A A IDDPDF IDDPD IDDA IDDASB IDDAPDF IDDAPD Digital Current, Power Down with Auto Finger Detection Enabled Digital Current, Power Down Analog Current, Dynamic Analog Current, Standby Analog Current, Power Down with Auto Finger Detection Enabled Analog Current, Power Down (Microprocessor Mode, VDD=3.3V) IDD IDDSB IDDPDF IDDPD IDDA IDDASB IDDAPDF IDDAPD Digital Current, Dynamic Digital Current, Standby Digital Current, Power Down with Auto Finger Detection Enabled Digital Current, Power Down Analog Current, Dynamic Analog Current, Standby Analog Current, Power Down with Auto Finger Detection Enabled Analog Current, Power Down y r a in im l e r P TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD 5 1 10 10 15 8 200 10 mA mA A A mA mA A A (SPI Slave Mode, VDD=3.3V) IDD IDDSB IDDPDF IDDPD IDDA IDDASB IDDAPDF IDDAPD Digital Current, Dynamic Digital Current, Standby Digital Current, Power Down with Auto Finger Detection Enabled Digital Current, Power Down Analog Current, Dynamic Analog Current, Standby Analog Current, Power Down with Auto Finger Detection Enabled Analog Current, Power Down TBD TBD TBD TBD TBD TBD TBD TBD 5 1 10 10 15 8 200 10 mA mA A A mA mA A A Fujitsu Microelectronics America, Inc. 23 Solid State Fingerprint Sweep SensorTM Power Supply Consumption (continued) Symbol (USB Mode, VDD=3.3V) IDD IDDSB IDDPDF IDDPD IDDSPF IDDSP IDDA IDDASB IDDAPDF IDDAPD Digital Current, Dynamic Digital Current, Standby Digital Current, Power Down with Auto Finger Detection Enabled Digital Current, Power Down Digital Current, USB Suspend with Auto Finger Detection Enabled Digital Current, USB Suspend Analog Current, Dynamic Analog Current, Standby Analog Current, Power Down with Auto Finger Detection Enabled Analog Current, Power Down TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD 5 1 10 10 10 10 30 20 200 10 mA mA A A A A mA mA A A Description Test Conditions Typ Max Units AC Characteristics Microprocessor Bus Mode Read Cycle Symbol tACC tCE tOE tOH tDF tDF Address to Output Delay Chip Select to Output Delay Read Enable to Output Delay Output Hold Time from Address, CS0, CS1, or RD, which ever occurs first RD high to Output High Z CS0 high or CS1 low to Output High Z Write Cycle Symbol tAS tCS tCS tAH tCH tCH tWP tWPH tDS tDH Address Setup to WR low CS0 Setup to WR low CS1 Setup to WR low Address Hold Time from WR high CS0 Hold Time from WR high CS1 Hold Time from WR high WR Pulse Width Low WR Pulse Width High Data Setup Time to WR low Data Hold Time to WR high y r a in im l e r P Description Description Min 5 5 5 5 - Max 35 35 35 10 10 Units ns ns ns ns ns ns Min 0 0 0 5 0 0 10 10 8 0 Max - Units ns ns ns ns ns ns ns ns ns ns 24 Fujitsu Microelectronics America, Inc. MBF300 SPI Slave Mode Symbol fSCK tCSS tCSH tWL tWH tCS tSU tH tV tHD tDIS SCLK Clock Frequency SCS Setup Time SCS Hold Time SCLK Low SCLK High SCS High Time Data-In Setup Time Data-In Hold Time Data-Out Valid Time Data-Out Hold Time Data-Out Disable Time Description Min 40 40 40 40 40 20 20 20 0 Max 12 30 100 Units MHz ns ns ns ns ns ns ns ns ns ns SPI Master Symbol fSCKM tCSSM tCSHM tWLM tWHM tCSM tSUM tHM tVM tHDM tDISM SCLK Clock Frequency SCS Setup Time SCS Hold Time SCLK Low SCLK High SCS High Time Data-In Setup Time Data-In Hold Time Data-Out Valid Time Data-Out Hold Time Data-Out Disable Time y r a in im l e r P Description Min 250 - Max 2 250 250 250 250 100 250 200 200 300 Units MHz ns ns ns ns ns ns ns ns ns ns Fujitsu Microelectronics America, Inc. 25 Solid State Fingerprint Sweep SensorTM Timing Diagrams tA C C A0 CS1 tC E CS0 tO E RD WR D[7:0] y r a in im l e r P Figure 1. Microprocessor Mode Read Cycle tD F tO H 26 Fujitsu Microelectronics America, Inc. MBF300 tA S A0 tA H CS1 tC S tC H CS0 RD WR D[7:0] SCS tC S S SCK y r a in im l e r P tW P tW P H tD S Figure 2. Microprocessor Mode Write Cycle tD H tC S tW L tW H tC S H tS U MOSI data in tH tV MISO data out tH D t DIS For read operations only. Figure 3. SPI Slave Mode Timing Fujitsu Microelectronics America, Inc. 27 Solid State Fingerprint Sweep SensorTM SCS Command Stage Address Stage Data Stage SCK Op Code Op Code 0 x 0 1 1 a4 Register Address a3 a2 a1 a0 0 0 0 Don't Care x MOSI 0 0 0 Data Out MISO Figure 4. SPI Slave Mode Read Operation d7 d6 d5 d4 d3 d2 d1 d0 SCS Command Stage SCK Op Code Op Code 0 x 0 1 MOSI 0 0 0 MISO SCS y r a in im l e r P Address Stage Register Address a3 a2 a1 0 a4 a0 0 0 0 d7 Data Stage Data In d5 d4 d3 d2 d1 d0 d6 High Impedance Figure 5. SPI Slave Mode Write Operation tC S M tC S S M SCK tW L M tW H M tC S H M tS U M MOSI data out tH M tV M MISO data in tH D M tD I S M Figure 6. SPI Master Timing 28 Fujitsu Microelectronics America, Inc. MBF300 SCS Command Stage Address Stage Data Stage SCK Op Code Op Code 0 0 0 1 1 a7 a6 ROM Address a5 a4 a3 a2 a1 a0 MOSI 0 0 0 Data In MISO d7 d6 d0 d7 d6 d0 Figure 7. SPI Master Read Operation y r a in im l e r P Fujitsu Microelectronics America, Inc. 29 Solid State Fingerprint Sweep SensorTM Physical Dimensions (all units in mm) PIN #2 13.416 0.05 TYP. 12.80 0.32 TYP. 3.336 0.116 0.80 0.20 0.07 8.70 30.00 PIN #3 13.80 y r a in im l e r P PIN #45 0.20 4.50 0.65 0.40 0.08 12.80 CONTACT PADS DIMENSION 1.60 0.30 NOM PAD PITCH 30 Fujitsu Microelectronics America, Inc. 1.40 MBF300 Array Orientation (0, 0) (255, 0) (0, 31) (255, 31) PIN 1 y r a in im l e r P PIN 45 Fujitsu Microelectronics America, Inc. 31 Solid State Fingerprint Sweep SensorTM Appendix A Recommended Power and Ground Connections The following describes the recommended method for reducing image noise to get the best image from the sensor. VDDA1 (Pin 1) and VDDA2 (Pin 7) are the analog power supply pins. VSSA1 (Pin 2) and VSSA2 (Pin 6) are the ground returns. Connect one bulk capacitor (4.7F to 10F) and two 0.1F capacitors in parallel between analog power and ground to provide filtering of low and high frequency noise. Place the bulk capacitor near VDDA1. Separate VDDA1 and VDDA2 from the digital power pins through a 10 ohm resistor. VDD1 (Pin 16), VDD2 (Pin 25), and VDD3 (Pin 39) are the digital power supply pins. VSS1 (Pin 15), VSS2 (Pin 24), and VSS3 (Pin 40) are the ground returns. Place 0.1F capacitors between digital power and ground, as close to the pins as possible. Input signals that are to be tied high should not be shorted directly to VDD, but connected through a 1K to 10K ohm resistor in order to maximize ESD immunity of the sensor. A single resistor may be used for all inputs that are tied high. VDD 0.1 F 40 VSS3 39 25 24 16 15 7 VDD3 VDD2 VSS2 VDD1 VSS1 VDDA2 y r a in im l e r P 10 0.1 F 0.1 F 0.1 F 6 2 VSSA2 VSSA1 0.1 F 4.7 to 10 F 1 VDDA1 32 Fujitsu Microelectronics America, Inc. MBF300 Appendix B Recommended handling and operating procedure for MBF300-FPC A. MBF300-FPC installation / Insertion to ZIF socket Lift carefully the actuator to disengage lid tab. Avoid to much pressure or forcefully lifting the lid tab in excess of 90 max. angle, as this may result to connector lid tab damage or potential solder joints crack. y r a in im l e r P B. MBF300-FPC removal Insert the MBF300-FPC in the slot. The contact pads must be on a "faced down"direction. Ensure that the edge connector of the FPC is fully inserted. Push down and lock the lid tab. Slight click or snap will be felt once the lid tab is totally locked. To unlock the socket, lift the lid tab up to 90. Slide out the MBF300-FPC until completely set free. Fujitsu Microelectronics America, Inc. 33 y r a in im l e r P FUJITSU MICROELECTRONICS AMERICA, INC. Corporate Headquarters 3545 North First Street, San Jose, California 95134-1804 Tel: (800) 866-8608 Fax: (408) 922-9179 E-mail: fmacrc@fma.fujitsu.com Web Site: http://www.fma.fujitsu.com (c)2002 Fujitsu Microelectronics America, Inc. All rights reserved. All company and product names are trademarks or registered trademarks of their respective owners. Printed in U.S.A. BMS-DS-20936-6/2002 |
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