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| Click here for this datasheet translated into Chinese! FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation August 2008 FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation Features Power-Off Isolation (VCC=0V) 0.8 Maximum On Resistance (RON) for 4.5V VCC 0.25 Maximum RON Flatness for 4.5V VCC Broad VCC Operating Range: 1.65V to 5.5V Fast Turn-On and Turn-Off Times Control Input Referenced to VIO Break-Before-Make Enable Circuitry 0.5mm WLCSP packaging ESD Performance Description The FSA2859 is a high-performance Double-Pole / Double-Throw (DPDT) analog switch for audio applications driven by low voltage (1.8V) baseband processors or ASICs. The device features ultra-low RON of 0.8 (maximum) at 4.5V VCC and operates over the wide VCC range of 1.65V to 5.5V. The device is fabricated with sub-micron CMOS technology to achieve fast switching speeds and is designed for break-before-make operation. The FSA2859 interfaces between the low-voltage ASIC and regular audio amplifiers and CODECs operating up to the supply range of 5.5V through the dual-voltage supplies of VIO and VCC. The VIO supply operates the control circuitry, allowing for 1.8V (typical) signals on the control pin (Sn). - HBM: JESD22-A114, I/O to GND CDM: JESD22-C101 IEC61000-4-2 Contact / Air 8kV 500V 8kV / 15kV Applications Cellular Phone Portable Media Player PDA IMPORTANT NOTE: For additional performance information, please contact analogswitch@fairchildsemi.com. Ordering Information Part Number FSA2859UCX Operating Temperature Top Range Mark -40C to +85C M2 Eco Status Green Package 12-Ball WLCSP, 0.5mm pitch Packing Method Tape and Reel For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. Analog Symbols V CC V IO Control S0 S1 1B0 1A 1B1 2B0 2A 2B1 GND Figure 1. Analog Symbol (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 www.fairchildsemi.com FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation Marking Information KK X Y Z = = = = Die Run Code Year Work Week Assembly Site Figure 2. Top Mark with Pin 1 Orientation Pin Configuration D3 3 S0 C3 4 1B1 B3 9 1A A3 10 1B0 D2 2 VIO C2 5 GND B2 8 GND A2 11 VCC D1 1 S1 C1 6 2B1 B1 7 2A A1 12 2B0 Figure 3. Pin Assignments (Top Through View) Pin Definitions Pin 1 2 3 4 5 6 7 8 9 10 11 12 Ball D1 D2 D3 C3 C2 C1 B1 B2 B3 A3 A2 A1 Name S1 VIO S0 1B1 GND 2B1 2A GND 1A 1B0 VCC 2B0 Description Control Input 1 Digital Control Supply Control Input 0 Data Port (Normally Open) Ground Data Port (Normally Open) Common Data Port 2 Ground Common Data Port 1 Data Port (Normally Closed) Supply Voltage Data Port (Normally Closed) Truth Table Control Input (S0,S1) S0 = Low S1 = Low S0 = High S1 = High (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 2 Function 1B0 connected to 1A 2B0 connected to 2A 1B1 connected to 1A 2B1 connected to 2A www.fairchildsemi.com FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VIO Vsw VIN IIK ISW ISWPEAK PD TSTG TJ TL Supply Voltage Digital Control Supply Voltage Switch Voltage Input Voltage (1) Parameter Min. -0.5 -0.5 nB0, nB1, nA S0,S1 -0.5 -0.5 Max. 6.5 6.5 VCC + 0.5 6.5 -50 200 Unit V V V V mA mA mA mW C C C kV V V kV (1) Input Diode Current Switch Current (Continuous) Peak Switch Current Power Dissipation at 85C Storage Temperature Range Maximum Junction Temperature Lead Temperature (Soldering, 10 Seconds) Human Body Model (JEDEC: JESD22-A114) Charged Device Model (JEDEC: JESD22-C101) Machine Model (JEDEC: JESD22-A115) IEC6100-4-2 Discharge system test performed on Fairchild's FSA2859 applications testing board Contact Air I/O to GND: 1A, 2A All Pins -65 Pulsed at 1ms Duration, <10% Duty Cycle 400 180 +150 +150 +260 8 2 500 100 8 15 ESD Note: 1 The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VIO VIN VSW TA JA Supply Voltage Parameter Digital Control Supply Control Input Voltage Switch Input Voltage Operating Temperature Thermal Resistance, Still Air (2) Min. 1.65 1.65 S0, S1 nB0, nB1, nA 0 0 -40 Max. 5.50 1.95 VIO VCC +85 350 Unit V V V V C C/W Note: 2 Control Input must be held HIGH or LOW; it must not float. (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 www.fairchildsemi.com 3 FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation Electrical Characteristics All typical values are at 25C unless otherwise specified. VIO=1.65 to 1.95V. Symbol VIHIO VILIO IIN Parameter Input Voltage High - VIO Input Voltage Low - VIO Control Input Leakage VCC (V) 1.95 to 5.50 1.95 to 5.50 1.95 to 5.50 Conditions TA=+25C Min. Typ. Max. TA=-40 to +85C Min. 0.65*VIO 0 Max. VIO 0.35*VIO 20 Unit V V nA VS0,S1=0 or VIO nA=1V,4.5V nB0 or nB1=4.5, 1V nA=1V,3.0V nB0 or nB1=3.0, 1V nA=0.5V,2.3V nB0 or nB1=2.3, 0.5V nA=0.3V,1.65V nB0 or nB1=1.65 ,0.3 V nA=float nB0 or nB1=4.5, 1V nA=float nB0 or nB1=3.0, 1V nA=float nB0 or nB1=2.3, 0.5V nA=float nB0 or nB1=1.65, 0.3V nA=1V,4.5V; nB0 or nB1=1V, 4.5V or floating nA=1V, 3.0V; nB0 or nB1=1V, 3.0V or floating nA=0.5V, 2.3V; nB0 or nB1=0.5V, 2.3V or floating nA=0.3V, 1.65V; nB0 or nB1=0.3V, 1.65V or floating nA=0 to 5.5V; nB0 or nB1=0 to 5.5V VIN=0 or VCC, IOUT=0 VIN=0 or VCC, IOUT=0 VIN=0 or VCC, IOUT=0 VIN=0 or VCC, IOUT=0 -2 2 -20 5.50 Off-Leakage Current of Port nB0 and nB1(3) 3.60 2.70 1.95 5.50 On-Leakage Current of Port nB0 and nB1(3) 3.60 2.70 1.95 5.50 3.60 IA(ON) On Leakage Current of Port nA(3) 2.70 -10 -10 -10 -5 -20 -10 -10 -5 -20 -10 -10 10 10 10 5 20 10 10 5 20 10 10 -50 -50 -50 -20 -100 -20 -20 -20 -100 -20 -20 50 50 nA 50 20 100 20 nA 20 20 100 20 20 nA INO(0FF), INC(OFF), INO(On), INC(On) 1.95 Power Off Leakage Current of Port A & Port B(3) -5 5 -20 20 IOFF 0 -1.00 0.01 1.00 -5.00 5.00 A 5.50 Quiescent Supply Current 3.60 2.70 1.95 10 1.0 0.5 0.5 50 25.0 20.0 15.0 500 100.0 50.0 50.0 nA ICC Continued on the following page... (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 www.fairchildsemi.com 4 FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation Electrical Characteristics (Continued) All typical values are at 25C unless otherwise specified. VIO=1.65 to 1.95V. Symbol Parameter VCC (V) 4.50 3.00 2.25 1.65 4.50 On Resistance Matching Between Channels(3, 5) 3.00 2.25 1.65 4.50 3.00 2.25 1.65 Conditions IOUT=-100mA, nB0 or nB1=2.5V IOUT=-100mA, nB0 or nB1=2.0V IOUT=-100mA, nB0 or nB1=1.8V IOUT=-100mA, nB0 or nB1=1.2V IOUT=-100mA, nB0 or nB1=2.5V IOUT=-100mA, nB0 or nB1=2.0V IOUT=-100mA, nB0 or nB1=1.8V IOUT=-100mA, nB0 or nB1=1.2V IOUT=-100mA, nB0 or nB1=1.0V, 1.5V, 2.5V IOUT=-100mA, nB0 or nB1=0.8V, 2.0V IOUT=-100mA, nB0 or nB1=0.8V, 1.8V IOUT=-100mA, nB0 or nB1=0.6V, 1.2V TA=+25C Min. Typ. 0.50 0.75 1.0 2.5 0.05 0.10 0.15 0.15 0.075 0.1 0.25 3.5 TA=-40 to +85C Max. 0.75 0.90 1.3 5.0 0.10 0.15 0.20 0.40 0.250 0.3 0.50 Min. Max. 0.80 1.20 Unit RON Switch On Resistance(3, 4) 1.6 7.0 0.10 0.15 0.20 0.40 0.250 0.3 0.60 RON RFLAT(ON) On Resistance Flatness(3, 6) Notes: 3 Guaranteed by characterization, not production tested for VCC=1.65 - 1.95V. 4 On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 5 RON=RON maximum - RON minimum measured at identical VCC, temperature, and voltage. 6 Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of conditions. (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 www.fairchildsemi.com 5 FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation AC Electrical Characteristics All typical value are at VIO=1.8V and VCC=1.8V, 2.5V, 3.0V, and 5.0V at 25C unless otherwise specified. Symbol Parameter VCC (V) 4.50 to 5.50 tON Turn-On Time(7) 3.00 to 3.60 2.30 to 2.70 1.65 to 1.95 4.50 to 5.50 3.00 to 3.60 tOFF Turn-Off Time(7) 2.30 to 2.70 1.65 to 1.95 4.50 to 5.50 tBBM Break-BeforeMake Time(7) 3.00 to 3.60 2.30 to 2.70 1.65 to 1.95 5.50 Q Charge Injection 3.30 2.50 1.65 OIRR Xtalk Off Isolation Crosstalk 1.8 to 5.0 1.8 to 5.0 5.50 BW -3db Bandwidth 3.30 2.50 1.65 THD Total Harmonic Distortion 1.80 5.00 RL=600, VIN=0.5VPP, f=20Hz to 20kHz RL=50 f=1MHz, RL=50 f=1MHz, RL=50 CL=1.0nF, VGEN=0V, RGEN=0 nB0 or nB1=VCC, RL=50, CL=35pF nB0 or nB1=VCC, RL=50, CL=35pF nB0 or nB1=VCC, RL=50, CL=35pF TA=+25C TA=-40 to +85C Conditions Min. 1.0 5.0 5.0 10.0 1.0 1.0 2.0 2.0 1.0 1.0 1.0 Typ. 12.0 15.0 20.0 50.0 9.5 9.0 10.0 28.0 10.0 14.0 21.0 35.0 47 33 23 10 -60 -65 60 58 55 50 .015 Max. 25.0 30.0 35.0 70.0 20.0 20.0 20.0 40.0 12.0 16.0 25.0 Min. 1.0 3.0 5.0 10.0 1.0 1.0 2.0 2.0 0.1 1.0 1.0 2.0 Max. 30.0 35.0 40.0 75.0 25.0 25.0 25.0 50.0 14.0 17.0 27.0 50.0 Unit Figure ns Figure 4 ns Figure 4 ns Figure 5 pC Figure 7 dB dB Figure 6 Figure 6 MHz Figure 9 % .002 Figure 10 Note: 7 Guaranteed by characterization, not production tested for VCC=1.65 - 1.95V. Capacitance Symbol CIN COFF CON Parameter Control Pin Input Capacitance nB Port Off Capacitance nA Port On Capacitance VCC (V) 0 1.65 to 5.50 1.65 to 5.50 Conditions f=1MHz f=1MHz f=1MHz TA=+25C Min. Typ. 3.2 50 150 Max. Unit pF pF pF (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 www.fairchildsemi.com 6 FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation Test Diagrams VCC VBn B0 or B1 A RL 50 Control Input VCC 0V 50% tR = tF = 2.5ns VOUT CL 35pF Switch Output VOUT 0V tON 0.9 x VOUT S GND tOFF 0.9 x VOUT CL includes fixture and stray capacitance. Logic input waveforms inverted for switches that have the opposite logic sense. Figure 4. Turn On / Off Timing VCC B0 B1 S Control Input GND VBn A RL 50 VOUT CL 35pF Control VCC Input 0V 50% tR = tF = 2.5ns VOUT TD 0.9 x VOUT CL includes fixture and stray capacitance. Figure 5. Break-Before-Make Timing VCC 10nF Network Analyzer 0 or VCC S BO 50 GND B1 VCC A VIN 50 50 ON-LOSS = 20log OFF-ISOLATION = 20log VOUT VIN VOUT VIN VOUT VIN VOUT MEAS 50 REF 50 CROSSTALK = 20log Figure 6. Off Isolation and Crosstalk (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 www.fairchildsemi.com 7 FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation Test Diagrams (Continued) VCC RGEN VGEN B0 or B1 S A CL VOUT VOUT VOUT In Off Off On On Q = VOUT * CL Off Off GND Control Input In Figure 7. Charge Injection 10nF VCC A S Capacitance Meter f = 1MHz B0 or B1 GND 0V or VCC Figure 8. On / Off Capacitance Measurement Setup VCC 10nF VIN Signal Generator 0dBm BN VIN Analyzer RL S Logic Input 0V or VCC Logic Input 0V or VCC Signal Generator 0dBm BN 10nF VCC A A Analyzer RL S GND GND Figure 9. Bandwidth Figure 10. Harmonic Distortion (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 www.fairchildsemi.com 8 FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation Physical Dimensions E 0.03 C A B (O0.300) SOLDER MASK OPENING 2X D F (O0.200) CU PAD 0.50 A1 0.50 1.50 PIN 1 AREA 0.03 C G 2X TOP VIEW 0.06 C 0.625 0.547 E RECOMMENDED LAND PATTERN (NSMD) 0.05 C 0.3780.018 0.2080.021 D C SEATING PLANE SIDE VIEWS NOTES: (X)+/-.018 0.50 F 0.005 CAB 12x O0.2600.02 A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCE PER ASMEY14.5M, 1994. D. DATUM C IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E. PACKAGE NOMINAL HEIGHT IS 586 MICRONS 39 MICRONS (547-625 MICRONS). F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. BALL D1 IS DESIGNATED PIN 1. H. BALL COMPOSITION: Sn95.5Ag3.9Cu0.6 I. DRAWING FILNAME: MKT-UC012ABrev2 D 0.50 C B A 12 3 (Y)+/-.018 BOTTOM VIEW Figure 11. 12-Ball, WLCSP 0.5mm Pitch Table 1. Product Specific Dimensions Product FSA2859UCX D 1.910 E 1.410 X 0.205 Y 0.205 Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 www.fairchildsemi.com 9 FSA2859 -- Dual-Voltage, 0.8 DPDT Analog Switch with Power-Off Isolation (c) 2007 Fairchild Semiconductor Corporation FSA2859 Rev. 1.0.1 www.fairchildsemi.com 10 |
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