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 PJSR12
Low Capacitance TVS and Diode Array
This diode array is configured to protect up to two data transmission lines acting as a line terminator, minimizing overshoot and undershoot conditions due to bus impedance as well as protect against over-voltage events as electrostatic discharges. Additionaly the TVS Device offers overvoltage transient protection between the operating voltage bus and ground plane.
3 4
2
SPECIFICATION FEATURES
Peak Power Dissipation of 500W 8/20s Maximum Capacitance of 5.0pF at 0Vdc 1MHz Line-to-Ground Maximum Leakage Current of 1A @ VRWM Industry Standard SMT Package SOT143 IEC61000-4-2, IEC61000-4-4 and IEC61000-4-5 Full Compliance 100% Tin Matte finish (LEAD-FREE PRODUCT)
VREF 4 I/O2 3
1
2
I/O1
1
GND
APPLICATIONS
RS422 Interface LAN/WLAN Access Point terminals Industrial control communication ports I 2C Bus Protection
SOT143
Marking Code:
S12
MAXIMUM RATINGS Tj = 25C Unless otherwise noted
Rating Peak Pulse Power (8/20s Waveform) Peak Pulse Current (8/20s Waveform) Operating Junction Temperature Range Storage Temperature Range Soldering Temperature, t max = 10s Symbol P PPM I PP TJ Tstg TL Value 500 16 -55 to +125 -55 to +150 260 Units W A C C C
10/6/2006
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PJSR12
ELECTRICAL CHARACTERISTICS
Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8/20s) Clamping Voltage (8/20s) Clamping Voltage (8/20s) Off State Junction Capacitance Symbol VWRM VBR IR Vc Vc Vc Cj I BR = 1mA VR = 12V I pp = 5A I pp = 10A I pp = 16A
0 Vdc Bias f = 1MHz Between I/O pins and GND 0 Vdc Bias f = 1MHz Between I/O pins
Tj = 25C unless otherwise noted
Conditions Min Typical Max 12 13.3 1 22 27 31 3.8 1.4 5 3 Units V V A V V V pF pF
TYPICAL CHARACTERISTIC CURVES
Surge Pulse Waveform Definition
Pulse Waveform 110 100 90 80 70 60 50 40 30 20 10 0 0
Maximum Clamping Voltage vs Ipp 8/20s
35
Clamping voltage, V
Percent of Ipp
50% of Ipp @ 20s
30
25
Rise time 10-90% - 8s
20
15
5 10 15 tim e, sec 20 25 30
5
7
9
11
13
15
Ipp, A (8/20sec)
Line to Ground Capacitance
5 4 Capacitance, pF 3 2 1 0 0 2 4 6 8 10 12 Bias Voltage, Vdc
10/6/2006
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PJSR12
PACKAGE DIMENSIONS - SOT143
(c) Copyright PanJit International, Inc 2006
The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others.
10/6/2006
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www.panjit.com


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