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HANBit
HMF8M8M4G
FLASH-ROM MODULE 8MByte (8M x 8-Bit) Part No. HMF8M8M4G GENERAL DESCRIPTION
The HMF8M8M4G is a high-speed flash read only memory (FROM) module containing 8,388,608 words organized in a x8bit configuration. The module consists of four 2M x 8 FROM mounted on a 72-pin, single-sided, FR4-printed circuit board. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0V flash or EPROM devices. Four chip enable inputs, (/CE1, /CE2, /CE3, /CE4) are used to enable the module's 4 bytes independently. Output enable (/OE) and write enable (/WE) can set the memory input and output. When FROM module is disable condition the module is becoming power standby mode, system designer can get low-power design. All module components may be powered from a single +5V DC power supply and all inputs and outputs are TTLcompatible.
FEATURES
w Part identification - HMF8M8M4 (Solder Plating Lead) PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 - 70 - 90 -120 19 20 21 22 23 72-pin SIMM M 24 Vss /CE0 /CE1 /CE2 /CE3 Vcc /WE /OE
PIN ASSIGNMENT
SYMBOL PIN 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 SYMBOL A15 A16 A17 A18 A19 Vcc A20 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 Vss DQ7 /RY_BY0 /RY_BY1 /RY_BY2 Vcc /RY_BY3 NC NC NC 72-PIN SIMM TOP VIEW PIN 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 SYMBOL NC NC NC NC NC NC NC NC NC NC Vcc NC NC NC Vss NC NC NC NC NC NC NC NC Vss
- HMF8M8M4G (Gold Plating Lead) w Access time : 70, 90, 120ns w High-density 8MByte design w High-reliability, low-power design w Single + 5V 0.5V power supply w Easy memory expansion w All inputs and outputs are TTL-compatible w FR4-PCB design w Low profile 72-pin SIMM w Minimum 1,000,000 write/erase cycle w Flexible sector architecture w Embedded algorithms w Erase suspend / Erase resume
/RESET A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14
OPTIONS
w Timing 70ns access 90ns access 120ns access w Packages
MARKING
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FUNCTIONAL BLOCK DIAGRAM
DQ0 - DQ7 A0 - A20 8 21
HMF8M8M4G
A0-20 /WE /OE /CE DQ 0-7 /RY_BY0
U1
/CE0 A0-20 /WE /OE /CE /CE2 A0-20 /WE /OE /CE /CE1 A0-20 /WE /OE /WE /OE /CE /CE3 DQ 0-7 DQ 0-7 DQ 0-7
U2
/RY_BY2
U3
/RY_BY1
U4
/RY_BY3
TRUTH TABLE
MODE STANDBY NOT SELECTED READ WRITE Note : X means don't care
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/OE X H L X
/CE H L L L
/WE X H H L
DQ HIGH-Z HIGH-Z Dout Din
POWER STANDBY ACTIVE ACTIVE ACTIVE
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ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage with respect to ground all other pins Voltage with respect to ground Vcc Storage Temperature Operating Temperature SYMBOL VIN,OUT VCC TSTG TA
HMF8M8M4G
RATING -2.0V to +7.0V -2.0V to +7.0V -65oC to +125oC -55oC to +125oC
Power Dissipation PD 4W w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Vcc for 10% device Supply Voltages Ground SYMBOL Vcc VSS MIN 4.5V 0 0 TYP. MAX 5.5V 0
DC AND OPERATING CHARACTERISTICS (0oC TA 70 oC ; Vcc = 5V 0.5V )
PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Vcc Active Current for Read(1) Vcc Active Current for Program /CE = VIL, /OE=VIH or Erase(2) Vcc Standby Current Low Vcc Lock-Out Voltage Notes: 1. The Icc current listed is typically less than 2mA/MHz, with /OE at VIH. 2. Icc active while embedded algorithm (program or erase) is in progress 3. Maximum Icc current specifications are tested with Vcc=Vcc max /CE= VIH ICC3 VLKO 3.2 1.0 4.2 mA V ICC2 60 mA TEST CONDITIONS Vcc=Vcc max, VIN= GND to Vcc Vcc=Vcc max, VOUT= GND to Vcc IOH = -2.5mA, Vcc = Vcc min IOL = 12mA, Vcc =Vcc min /CE = VIL, /OE=VIH, SYMBOL IL1 IL0 VOH VOL ICC1 2.4 0.45 40 MIN MAX 1.0 1.0 UNITS A A V V mA
ERASE AND PROGRAMMING PERFORMANCE
LIMITS PARAMETER MIN. Sector Erase Time TYP. 1 MAX. Excludes 00H programming 8 sec prior to erasure UNIT COMMENTS
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Byte Programming Time 7 300 s
HMF8M8M4G
Excludes system-level overhead Excludes system-level
Chip Programming Time
-
14.4
43.2
sec overhead
TSOP CAPACITANCE
PARAMETER SYMBOL CIN COUT CIN2 PARAMETER TEST SETUP DESCRIPTION Input Capacitance Output Capacitance Control Pin Capacitance
o
MIN 6 8.5 7.5
MAX 7.5 12 9
UNIT pF pF pF
VIN = 0 VOUT = 0 VIN = 0
Notes : Test conditions TA = 25 C, f=1.0 MHz.
AC CHARACTERISTICS u Read Only Operations Characteristics
PARAMETER SYMBOLS JEDEC tAVAV tAVQV STANDARD tRC tACC Address to Output Delay /OE = VIL tELQV tGLQV tEHQZ tGHQZ tAXQX tCE tOE tDF tDF tQH /CE or /OE, Whichever Occurs First Chip Enable to Output Delay Chip Enable to Output Delay Chip Enable to Output High-Z Output Enable to Output High-Z Output Hold Time From Addresses, Min 0 0 ns /OE = VIL Max Max Max Max 70 40 20 20 90 40 20 20 ns ns ns ns Read Cycle Time /CE = VIL Max 70 90 ns Min 70 90 ns DESCRIPTION TEST SETUP -75 -90 UNIT
TEST SPECIFICATIONS
TEST CONDITION Output load Output load capacitance, 100 CL (Including jig capacitance) Input rise and full times Input pulse levels Input timing measurement reference levels Output timing measurement reference levels 20 0.45-2.4 0.8 2.0 ns V V V pF ALL SPEED OPTIONS 1TTL gate UNIT
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HMF8M8M4G
5.0V
2.7k Device Under Test CL IN3064 or Equivalent
6.2k
Diodes = IN3064 or Equivalent
Note : CL = 100pF including jig capacitance
u Erase/Program Operations
PARAMETER SYMBOLS JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX STANDARD tWC tAS tAH tDS tDH tOES tGHWL tELWL tWHEH tWLWH tWHWL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH tWHWH1 tWHWH2 tVCS Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Byte Programming Operation Sector Erase Operation (Note1) Vcc set up time Min Min Min Min Min Min Min Min Min Min Min Typ Typ Min 70 0 40 40 0 0 0 0 0 40 20 7 1 50 90 0 45 45 0 0 0 0 0 45 20 7 1 50 ns ns ns ns ns ns ns ns ns ns ns s sec s DESCRIPTION -75 -90 UNIT
Notes : 1. This does not include the preprogramming time 2. This timing is only for Sector Protect operations
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u Erase/Program Operations Alternate /CE Controlled Writes
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX STANDARD tWC tAS tAH tDS tDH tOES tGHWL tELWL tWHEH tWLWH tWHWL tWHWH1 tWHWH2 Notes : 1. This does not include the preprogramming time 2. This timing is only for Sector Protect operations tGHWL tCS tCH tWP tWPH tWHWH1 tWHWH2 Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Byte Programming Operation Sector Erase Operation (Note1) Min Min Min Min Min Min Min Min Min Min Min Typ Typ 70 0 40 40 0 0 0 0 0 40 20 7 1 -75
HMF8M8M4G
-90 90 0 45 45 0 0 0 0 0 45 20 7 1
UNIT ns ns ns ns ns ns ns ns ns ns ns s sec
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u READ OPERATIONS TIMING
HMF8M8M4G
u RESET TIMING
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u PROGRAM OPERATIONS TIMING
HMF8M8M4G
u CHIP/SECTOR ERASE OPERATION TIMINGS
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u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
HMF8M8M4G
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
HMF8M8M4G
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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PACKAGE DIMENSIONS
HMF8M8M4G
108mm 3.2 mm
6.35 mm
1
72
2.03 mm
1.02 mm
6.35 mm 95.25 mm
1.27 mm
3.34 mm
2.54 mm 0.25 mm MAX MIN
Gold: 1.040.10 mm 1.27 Solder: 0.9140.10 mm
1.290.08 mm
(Solder & Gold Plating)
ORDERING INFORMATION
Component Number 4EA 4EA 4EA
Part Number
Density
Org.
Package
Vcc
SPEED
HMF8M8M4G-70 HMF8M8M4G-90 HMF8M8M4G-120
8MByte 8MByte 8MByte
8M X 8bit 8M X 8bit 8M X 8bit
72 Pin-SIMM 72 Pin-SIMM 72 Pin-SIMM
5V 5V 5V
70ns 90ns 120ns
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