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19-3946; Rev 0; 1/06
KIT ATION EVALU E AILABL AV
Audio/Video Switch for Dual SCART Connector
General Description
The MAX9595 dual SCART switch matrix routes audio and video signals between an MPEG encoder and two external SCART connectors under I2C control, and meets the requirements of EN50049-1, IEC 933-1, Canal+, and BSkyB standards. The video and audio channels feature input source selection multiplexers, input buffers, and output buffers for routing all inputs to selected outputs. The MAX9595 provides programmable gain control from +5dB to +7dB in 1dB steps for red, green, and blue component video signals. All other video outputs have a fixed +6dB gain. Additional features include an internal luma and chroma (Y/C) mixer that generates a composite video signal (CVBS) to supply an RF modulator output, and internal video reconstruction lowpass filters with a cutoff frequency of 6MHz. The MAX9595 TV audio channel features clickless switching and programmable volume control from -56dB to +6dB in 2dB steps. The VCR audio output also has programmable gain for -6dB, 0dB, or +6dB. The device also generates monaural audio from left and right stereo inputs. All audio drivers deliver a 3.0VRMS minimum output. The MAX9595 operates with standard 5V and 12V power supplies and supports slow-switching and fastswitching signals. The I 2 C interface programs the gain and volume control, and selects the input source for routing. The MAX9595 is available in a compact 48-pin thin QFN package and is specified over the 0C to +70C commercial temperature range. Video Outputs Drive 2VP-P into 150 Audio Outputs Drive 3VRMS into 10k Clickless, Popless Audio Gain Control and Switching Interrupt Output Detects Changes on Slow Switching Input AC-Coupled Video Inputs with Internal Clamp and Bias DC-Coupled Video Outputs Composite Video Signal Created Internally from Y/C Inputs Internal Video Reconstruction Filters Provide -50dB at 27MHz Single-Ended Audio Input Red/Chroma Switch for Bidirectional I/O I2C-Programmable RGB Gain from +5dB to +7dB I2C-Programmable Audio Gain Control from +6dB to -56dB Meets EN50049-1, IEC 933-1, Canal+, and BSkyB Requirements
Features
MAX9595
Ordering Information
PART TEMP RANGE 0C to +70C PINPACKAGE 48 Thin QFN-EP* (7mm x 7mm) PKG CODE T4877-6
Applications
Satellite Set-Top Boxes Cable Set-Top Boxes TVs VCRs DVDs
MAX9595CTM+
*EP = Exposed paddle. +Denotes lead-free package.
Pin Configuration and Typical Application Circuit appear at end of data sheet. System Block Diagram appears at end of data sheet. Purchase of I2C components from Maxim Integrated Products, Inc. or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Audio/Video Switch for Dual SCART Connector MAX9595
ABSOLUTE MAXIMUM RATINGS
VVID to GNDVID........................................................-0.3V to +6V V12 to GNDAUD .....................................................-0.3V to +14V VAUD to GNDAUD ....................................................-0.3V to +6V GNDAUD to GNDVID ............................................-0.1V to +0.1V All Video Inputs, ENCIN_FS, VCRIN_FS, SET to GNDVID......................................-0.3V to (VVID + 0.3V) All Audio Inputs, AUDBIAS to GNDAUD .........................-0.3V to (VAUD + 0.3V) SDA, SCL, DEV_ADDR, INTERRUPT_OUT to GNDVID ..............................-0.3V to +6V All Audio Outputs, TV_SS, VCR_SS to GNDAUD...............................-0.3V to (V12 + 0.3V) INTERRUPT_OUT Current ................................................+50mA All Video Outputs, TVOUT_FS to VVID, VAUD, GNDAUD, GNDVID ................................................Continuous All Audio Outputs to VVID, VAUD, V12, GNDVID, GNDAUD ................................................Continuous Continuous Power Dissipation (TA = +70C) 48-Pin Thin QFN (derate 27mW/C above +70C) .....2105.3mW Operating Temperature Range...............................0C to +70C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V12 = 12V, VVID = VAUD = 5V; 0.1F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100k nominal, RLOAD = 150, TA = 0C to +70C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER VVID Supply Voltage Range VAUD Supply Voltage Range V12 Supply Voltage Range VVID Quiescent Supply Current SYMBOL VVID VAUD V12 IVID_Q CONDITIONS Inferred from video gain test Inferred from audio gain test Inferred from slow switching levels All video output amplifiers are enabled, no load All video output amplifiers are in shutdown, and TV_FS_OUT driver is in shutdown, no load No load No load CVBS and Y-C, 1VP-P input Voltage Gain G_V RGB, 1VP-P input, (programmable gain control) TA = +25C, f = 6MHz, VIN = 1VP-P TA = +25C, f = 27MHz, VIN = 1VP-P VOUT = 2VP-P VOUT = 2VP-P, settle to 0.1% (Note 2) 1VP-P input, between RGB or Y-C 5-step modulated staircase 5-step modulated staircase -0.5 0.4 0.2 35 +5.5 +4.5 +5.5 +6.5 LP Filter Attenuation LP Filter Suppression Slew Rate Settling Time Gain Matching Differential Gain Differential Phase ATTN SPPR SR tS AG DG DP MIN 4.75 4.75 11.4 TYP 5.0 5.0 12.0 69 MAX 5.25 5.25 12.6 100 mA V UNITS
VVID Standby Supply Current VAUD Quiescent Supply Current V12 Quiescent Supply Current VIDEO CHARACTERISTICS
IVID_Q IAUD_Q I12_Q
40 2.4 3.6 +6.0 +5.0 +6.0 +7.0 1.2 50 8 380
60 6 6 +6.5 +5.5 +6.5 +7.5 3.3
mA mA mA
dB
dB dB V/s ns
+0.5
dB % degrees
2
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Audio/Video Switch for Dual SCART Connector
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 5V; 0.1F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100k nominal, RLOAD = 150, TA = 0C to +70C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Signal-to-RMS Noise Group Delay Variation Sync-Tip Clamp Level Chroma Bias Droop Power-Supply Rejection Ratio Input Impedance Input Clamp Current Pulldown Resistance SYMBOL SNR_V GD V_CLMP V_BIAS D PSRR_V ZIN ICLMP RP VIN = 1VP-P f = 0.1MHz to 4.43MHz RGB, composite, and luma input, no signal, no load Chroma input only, no signal, no load Set by input current DC, 0.5VP-P CVBS or RGB video inputs, VIN > V_CLMP Chroma video input. VIN = V_BIAS VIN = 1.75V Enable VCR_R/C_OUT and TV_R/C_OUT pulldown through I2C, (see registers 7 and 9 for loading register details) RGB, composite, and luma, no signal, no load Chroma, no signal, no load Crosstalk Mute Suppression XTLK Between any two active inputs, f = 4.43MHz, VIN = 1VP-P 2.5 -2 48 4 11 5 10 8.0 CONDITIONS MIN TYP 65 14 1.21 1.9 +2 MAX UNITS dB ns V V % dB M k A
MAX9595
Output Pin Bias Voltage
VOUT
1.08 2.27 -50 -50
V
dB dB
M_SPR_V f = 4.43MHz, VIN = 1VP-P, on one input only TV or VCR to stereo, gain = 0dB, VIN = 1VP-P
AUDIO CHARACTERISTICS (Note 3) -0.5 2.5 3.02 6.02 -0.5 0 3.0 3.52 6.52 0 0.01 230 0.2308 x V12 +0.5 3.5 4.02 7.02 +0.5 dB dB kHz V dB
Voltage Gain (Measured From Application Input)
G_A
TV or VCR to mono, gain = 0dB, VIN = 1VP-P ENC to stereo, gain = 0dB, VIN = 1VP-P ENC to mono, gain = 0dB, VIN = 1VP-P
Gain Matching Between Channels Flatness Frequency Bandwidth Input DC Level (Excluding Encoder Inputs which are Hi-Z)
G_A A BW VIN
Gain = 0dB, VIN = 1VP-P f = 20Hz to 20kHz, 0.5VRMS input, gain = 0dB 0.5VRMS input, frequency where output is -3dB referenced to 1kHz Gain = 0dB
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Audio/Video Switch for Dual SCART Connector MAX9595
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 5V; 0.1F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100k nominal, RLOAD = 150, TA = 0C to +70C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Input Signal Amplitude (Measured from Application Input) Input Resistance (Measured at Parts Input) SYMBOL CONDITIONS Single-ended inputs, f = 1kHz, THD < 1% VIN_AC ENC inputs single-ended, f = 1kHz, THD < 1% Single ended: VCR_INR, VCR_INL, TV_INR, TV_INL Encoder, ENC_INL, ENC_INR Output DC Level Signal-to-Noise Ratio (Measured from Application Input) Total Harmonic Distortion Plus Noise Output Impedance VOUT_DC SNR_A THD+N ZO VIN = 0V f = 1.0kHz, 1VRMS application input, gain = 0dB, 20Hz to 20kHz RLOAD = 10k, f = 1.0kHz, 0.5VRMS output RLOAD = 10k, f = 1.0kHz, 2VRMS output f = 1kHz 1.414VP-P input, programmable gain to TV SCART volume control range extends from -56dB to +6dB 1.414VP-P input, programmable gain to VCR audio extends from -6dB to +6dB From V12, f = 1kHz, 0.5VP-P, (CAUD_BIAS = 47F), gain = 0dB From VAUD, f = 1kHz, 0.5VP-P, VAUD +4.75V, VAUD +5.25V, gain = 0dB Mute Suppression Audio Clipping Level Left-to-Right Crosstalk Crosstalk M_SPR_A VCLIP XTLK_LR f = 1kHz, 0.5VRMS input, set through I2C, see register 1 for loading register details f = 1kHz, 2.5VRMS input, gain = 6dB, THD < 1% f = 1kHz, 0.5VRMS input, gain = 0dB 1.5 MIN TYP 3 VRMS 1.31 0.1 M 0.1 0.5 x V12 95 0.004 0.004 1 2 2.5 dB 5.5 6 75 dB 75 90 3.6 80 90 dB VRMS dB dB 6.5 V dB % MAX UNIT
RIN
Volume Attenuation Step
ASTEP
Power-Supply Rejection Ratio
PSRR_A
TV SCART to VCR SCART or VCR SCART to XTLK_CC TV SCART, f = 1kHz, 0.5VRMS input, gain = 0dB
4
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Audio/Video Switch for Dual SCART Connector
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 5V; 0.1F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100k nominal, RLOAD = 150, TA = 0C to +70C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Low-Level Input Voltage High-Level Input Voltage Hysteresis of Schmitt Trigger Input SDA Low-Level Output Voltage Output Fall Time for SDA Line Spike Suppression Input Current Input Capacitance SCL Clock Frequency Hold Time Low Period of SCL Clock High Period of SCL Clock Setup Time for a Repeated Start Condition Data Hold Time Data Setup Time Setup Time for Stop Condition Bus Free Time Between a Stop and Start OTHER DIGITAL PINS (Note 4) DEV_ADDR Low Level DEV_ADDR High Level INTERRUPT_OUT Low Voltage INTERRUPT_OUT High Leakage Current SLOW SWITCHING SECTION (Note 4) Input Low Level Input Medium Level Input High Level Input Current 0 4.5 9.5 50 2 7.0 V12 100 V V V A INTERRUPT_OUT sinking 1mA VINTERRUPT_OUT = 5V 2.6 0.15 1 0.4 10 0.8 V V V A tHD,STA tLow tHIGH tSU,STA tHD,DAT tSU,DAT tSU,STO tBUF 0 0.6 1.3 0.6 0.6 0 100 0.6 1.3 0.9 -10 5 400 VOL ISINK = 3mA ISINK = 6mA 400pF bus load 50 +10 SYMBOL VIL VIH CONDITIONS MIN 0 2.6 0.2 0.4 0.6 250 TYP MAX 0.8 UNIT V V V V ns ns A pF kHz s s s s s ns s s
MAX9595
DIGITAL INTERFACE: SDA and SCL (Note 4)
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Audio/Video Switch for Dual SCART Connector MAX9595
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 5V; 0.1F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, and VVID to GNDVID; SET = 100k nominal, RLOAD = 150, TA = 0C to +70C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Output Low Level Output Medium Level Output High Level FAST SWITCHING SECTION (Note 4) Input Low Level Input High Level Input Current Output Low Level Output High Level Fast Switching Output to RGB Skew Fast Switching Output Rise Time Fast Switching Output Fall Time ISINK = 0.5mA ISOURCE = 20mA, VVID - VOH (Note 5) 150 to ground 150 to ground 0 0 1 1 0.01 0.75 30 30 30 0.4 3 10 0.2 2 V V A V V ns ns ns SYMBOL CONDITIONS 10k to ground, internal TV, 11.4 < V12 < 12.6 10k to ground, external 16/9, 11.4 < V12 < 12.6 10k to ground, external 4/3, 11.4 < V12 < 12.6 MIN 0 5 10 TYP MAX 1.5 6.5 V12 UNIT V V V
Note 1: All devices are 100% tested at TA = +25C. All temperature limits are guaranteed by design. Note 2: The settling time is measured from the 50% of the input swing to the 0.1% of the final value of the output. Note 3: Maximum load capacitance is 200pF. All the listed parameters are measured at application's inputs, unless otherwise noted. See the Typical Application Circuits. Note 4: Guaranteed by design. Note 5: Difference in propagation delays of fast-blanking signal and RGB signals. Measured from 50% input transition to 50% output transition. Signal levels to be determined.
Typical Operating Characteristics
(V12 = 12V, VVID = VAUD = 5V, 0.1F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, VVID to GNDVID no load, TA = 0C to +70C, unless otherwise noted. Typical values are at TA = +25C.)
R/G/B VIDEO LARGE-SIGNAL BANDWIDTH vs. FREQUENCY
MAX9595 toc01
GROUP DELAY vs. FREQUENCY
MAX9595 toc02
Y VIDEO LARGE-SIGNAL BANDWIDTH vs. FREQUENCY
3 2 1 GAIN (dB) 0 -1 -2 -3 -4 -5 VIN = 1VP-P RL = 150 TO GNDVID
MAX9595 toc03
4 3 2 1 GAIN (dB) 0 -1 -2 -3 -4 -5 -6
VIN = 1VP-P RL = 150 TO GNDVID
120 100 GROUP DELAY (ns) 80 60 40 20 0
4
-6 0.1 1 FREQUENCY (MHz) 10 0.1 1 FREQUENCY (MHz) 10
0.1
1 FREQUENCY (MHz)
10
6
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Audio/Video Switch for Dual SCART Connector MAX9595
Typical Operating Characteristics (continued)
(V12 = 12V, VVID = VAUD = 5V, 0.1F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, VVID to GNDVID no load, TA = 0C to +70C, unless otherwise noted. Typical values are at TA = +25C.)
R/G/B VIDEO SMALL-SIGNAL BANDWIDTH vs. FREQUENCY
MAX9595 toc04
Y VIDEO SMALL-SIGNAL BANDWIDTH vs. FREQUENCY
MAX9595 toc05
VIDEO CROSSTALK vs. FREQUENCY
-10 -20 CROSSTALK (dB) -30 -40 -50 -60 -70 -80 -90 -100 VIN = 100mVP-P RL = 150 TO GNDVID
MAX9595 toc06
4 3 2 1 GAIN (dB)
VIN = 100mVP-P RL = 150 TO GNDVID
4 3 2 1 GAIN (dB) 0 -1 -2 -3 -4 -5 -6 VIN = 100mVP-P RL = 150 TO GNDVID
0
0 -1 -2 -3 -4 -5 -6 0.1 1 FREQUENCY (MHz) 10
0.1
1 FREQUENCY (MHz)
10
0.1
1 FREQUENCY (MHz)
10
AUDIO LARGE-SIGNAL BANDWIDTH vs. FREQUENCY
MAX9595 toc07
AUDIO CROSSTALK vs. FREQUENCY
VIN = 0.5VRMS RL = 10k TO GNDAUD
MAX9595 toc08
AUDIO TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY
MAX9595 toc09
4 3 2 1 GAIN (dB) 0 -1 -2 -3 -4 -5 -6 1 10 100 VIN = 0.5VRMS RL = 10k TO GNDAUD
0 -20 CROSSTALK (dB) -40
0
0.1 AMPLITUDE = 3.0VRMS THD+N (%) AMPLITUDE = 0.5VRMS 0.01
-60 -80
0.001 -100 -120 1000 0.01 0.1 1 FREQUENCY (kHz) 10 100 FREQUENCY (kHz) 0.0001 0.01 0.1 1 FREQUENCY (kHz) 10 100 AMPLITUDE = 2.0VRMS
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY
MAX9595 toc10
VVID QUIESCENT SUPPLY CURRENT vs. TEMPERATURE
VVID QUIESCENT SUPPLY CURRENT (mA) ALL VIDEO OUTPUT AMPLIFIERS ENABLED NO LOAD
MAX9595 toc11
0 -10 -20 -30 PSRR (dB) -40 -50 -60 -70 -80 -90 -100 0.01 0.1 1 FREQUENCY (kHz) 10 WITH RESPECT TO VAUD WITH RESPECT TO V12
80 75 70 65 60 55 50
100
0
25
50
75
TEMPERATURE (C)
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Audio/Video Switch for Dual SCART Connector MAX9595
Typical Operating Characteristics (continued)
(V12 = 12V, VVID = VAUD = 5V, 0.1F X5R capacitor in parallel with a 10F aluminum electrolytic capacitor from VAUD to GNDAUD, V12 to GNDAUD, VVID to GNDVID no load, TA = 0C to +70C, unless otherwise noted. Typical values are at TA = +25C.)
VVID STANDBY QUIESCENT SUPPLY CURRENT vs. TEMPERATURE
VVID STANDBY QUIESCENT SUPPLY CURRENT (mA)
MAX9595 toc12
V12 QUIESCENT SUPPLY CURRENT vs. TEMPERATURE
MAX9595 toc13
VAUD QUIESCENT SUPPLY CURRENT vs. TEMPERATURE
VAUD QUIESCENT SUPPLY CURRENT (mA) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 25 50 75
MAX9595 toc14
50
V12 QUIESCENT SUPPLY CURRENT (mA)
ALL VIDEO OUTPUT AMPLIFIERS DISABLED
5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0 25 50
4.0
45
40
35
30 0 25 50 75 TEMPERATURE (C)
75
TEMPERATURE (C)
TEMPERATURE (C)
INPUT CLAMP AND BIAS LEVEL vs. TEMPERATURE
MAX9595 toc15
INPUT CLAMP CURRENT vs. TEMPERATURE
VIN = 1.75V 5.5 INPUT CLAMP CURRENT (A) 5.0 4.5 4.0 3.5 3.0 2.5 2.0
MAX9595 toc16
2.5 INPUT CLAMP AND BIAS LEVEL (V) 2.3 2.1 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 0 25 50 BOTTOM LEVEL CLAMP BIAS
6.0
75
0
25
50
75
TEMPERATURE (C)
TEMPERATURE (C)
INPUT CLAMP CURRENT vs. INPUT VOLTAGE
MAX9595 toc17
OUTPUT BIAS VOLTAGE vs. TEMPERATURE
CHROMA 2.5 OUTPUT BIAS VOLTAGE (V) 2.0 1.5 1.0 0.5 0 RGB, LUMA, CVBS
MAX9595 toc18
0.5 0.4 INPUT CLAMP CURRENT (mA) 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0 1 2 3 4 5 INPUT VOLTAGE (V)
3.0
0
25
50
75
TEMPERATURE (C)
8
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Audio/Video Switch for Dual SCART Connector
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24, 36 25 26 27 28 29 30 31 NAME SDA SCL DEV_ADDR ENC_INL INTERRUPT_OUT ENC_INR N.C. VCR_INR VCR_INL TV_INR TV_INL GNDAUD AUD_BIAS VAUD VCR_OUTR VCR_OUTL RF_MONO_OUT TV_OUTL TV_OUTR V12 TV_SS VCR_SS SET VVID VCRIN_FS ENCIN_FS TVOUT_FS GNDVID RF_CVBS_OUT TV_Y/CVBS_OUT TV_R/C_OUT Bidirectional Data I/O. I2C FUNCTION -compatible, 2-wire interface data input/output. Output is open drain. Serial Clock Input. I2C -compatible, 2-wire clock interface. Device Address Set Input. Connect to GNDVID to set write and read addresses of 94h or 95h, respectively. Connect to VVID to set write and read address of 96h or 97h, respectively. Digital Encoder Left-Channel Audio Input Interrupt Output. INTERRUPT_OUT is an open-drain output that goes high impedance to indicate a change in the slow switch lines, TV_SS or VCR_SS. Digital Encoder Right-Channel Audio Input No Connection. Not internally connected. VCR SCART Right-Channel Audio Input VCR SCART Left-Channel Audio Input TV SCART Right-Channel Audio Input TV SCART Right-Channel Audio Input Audio Ground Audio Input Bias Voltage. Bypass AUD_BIAS with a 47F capacitor and a 0.1F capacitor to AUDGND. Audio Supply. Connect to a +5V supply. Bypass with a 10F aluminum electrolytic capacitor in parallel with a 0.47F low-ESR ceramic capacitor to GNDAUD. VCR SCART Right-Channel Audio Output VCR SCART Left-Channel Audio Output RF Modulator Mono Audio Output TV SCART Left-Channel Audio Output TV SCART Right-Channel Audio Output +12V Supply. Bypass V12 with a 10F capacitor in parallel with a 0.1F capacitor to ground. TV SCART Bidirectional Slow-Switch Signal VCR SCART Bidirectional Slow-Switch Signal Filter Cutoff Frequency Set Input. Connect 100k resistor from SET to ground. Video and Digital Supply. Connect to a +5V supply. Bypass with a 0.01F capacitor to GNDVID. VVID also serves as a digital supply for the I2C interface. VCR SCART Fast-Switching Input Digital Encoder Fast-Switching Input TV SCART Fast-Switching Output. This signal is used to switch the TV to its RGB inputs for onscreen display purposes. Video Ground RF Modulator Composite Video Output. Internally biased at 1V. TV SCART Luma/Composite Video Output. Internally biased at 1V. TV SCART Red/Chroma Video Output. Internally biased at 1V for red video signal and 2.2V for chroma video signal.
MAX9595
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Audio/Video Switch for Dual SCART Connector MAX9595
Pin Description (continued)
PIN 32 33 34 35 37 38 39 40 41 42 43 44 45 46 47 48 EP NAME TV_G_OUT TV_B_OUT FUNCTION TV SCART Green Video Output. Internally biased at 1V. TV SCART Blue Video Output. Internally biased at 1V. VCR SCART Red/Chroma Video Output. Internally biased at 1V for red video signals and 2.2V for chroma video signal. TV SCART Red/Chroma Video Input. Internally biased at 1V for red video signals, or 2.2V for chroma video signals. TV SCART Luma/Composite Video Input. Internally biased at 1.2V. VCR SCART Luma/Composite Video Input. Internally biased at 1.2V. VCR SCART Red/Chroma Video Input. Internally biased at 1.2V for red video signals and 1.9V for chroma video signals. VCR SCART Green Video Input. Internally biased at 1.2V. VCR SCART Blue Video Input. Internally biased at 1.2V. Digital Encoder Luma/Composite Video Input. Internally biased at 1.2V. Digital Encoder Red/Chroma Video Input. Internally biased at 1.2V for red video signals, or 1.9V for chroma video signals. Digital Encoder Green Video Input. Internally biased at 1.2V. Digital Encoder Blue Video Input. Internally biased at 1.2V. Digital Encoder Luma Video Input. Internally biased at 1.2V. Digital Encoder Chroma Video Input. Internally biased at 1.9V. Exposed Paddle. Solder to the circuit board ground (GNDAUD) for proper thermal and electrical performance.
VCR_Y/CVBS_OUT VCR SCART Luma/Composite Video Output. Internally biased at 1V. VCR_R/C_OUT TV_R/C_IN TV_Y/CVBS_IN VCR_Y/CVBS_IN VCR_R/C_IN VCR_G_IN VCR_B_IN ENC_Y/CVBS_IN ENC_R/C_IN ENC_G_IN ENC_B_IN ENC_Y_IN ENC_C_IN GNDAUD
Detailed Description
The MAX9595 is a switch matrix that routes audio and video signals between different ports using the I 2C interface. The ports consist of the MPEG decoder output, and two SCART connectors for the TV and VCR. Per EN50049 and IEC 933, the encoder can only input a signal to the SCART connector, while TV and VCR SCART connectors are bidirectional. The MAX9595 circuitry consists of four major sections: the video section, the audio section, the slow- and fastswitching section, and the digital interface. The video section consists of clamp and bias circuitry, input buffers, reconstruction filters, a switch matrix, a Y/C mixer, and output buffers. All video inputs are ACcoupled through a 0.1F capacitor to set an acceptable DC level using clamp or bias networks. The bidirectional red/chroma outputs can be connected to ground
using I 2 C control to make them terminations when red/chroma is an input (see the Video Inputs section). The audio section features an input buffer, a switching matrix, volume- or gain-control circuitry, and output drivers. The audio inputs are AC-coupled through a 0.1F capacitor. The TV output audio path has volume control from -56dB to +6dB in 2dB steps, while the VCR output audio path has volume control from -6dB to +6dB in 6dB steps. The MAX9595 can be configured to switch inputs during a zero-crossing function to reduce clicks. The slow-switching feature allows for bidirectional, trilevel, slow-switching input and output signals at pin VCR_SS and TV_SS, respectively. The slow-switching signals from the VCR set the aspect ratio or video source of the TV screen. If INTERRUPT_OUT is enabled, then INTERRUPT_OUT changes to a high-impedance state if any of the slow-switching inputs change logic levels. See the Slow Switching section.
10
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Audio/Video Switch for Dual SCART Connector MAX9595
Fast switching consists of two inputs from the encoder and VCR, and one output to the TV to insert an onscreen display (OSD). Fast switching is used to route video signals from the VCR or from the encoder to the TV. In addition, the fast-switching output can be configured to a high or low voltage. Fast switching is controlled through the I2C interface. The digital block contains the 2-wire interface circuitry, control, and status registers. The MAX9595 can be configured through an I 2 C-compatible interface. DEV_ADDR sets the I2C-compatible address.
SCART Video Switching
The MAX9595 switches video signals between an MPEG decoder, TV SCART, and VCR SCART. The video switch includes reconstruction filters, multiplexed video amplifiers, and a Y-C mixer driver for an RF modulator. See Figure 1 for the functional diagram of the video section. While the SCART connector supports RGB, S-video, and composite video formats, RGB, and S-video typically share a bidirectional set of SCART connector pins.
TV_R/C_IN TV_Y/CVBS_IN
CLAMP/BIAS CLAMP
FILTER
x2
VCR_Y/CVBS_OUT
VCR_B_IN VCR_G_IN VCR_R/C_IN VCRIN_FS
CLAMP CLAMP CLAMP/BIAS
FILTER
x2 PULLDOWN VCRRCOUT N
VCR_R/C_OUT
0.7V FILTER VCR_Y/CVBS_IN ENC_Y/CVBS_IN ENC_R/C_IN ENC_G_IN ENC_B_IN ENC_Y_IN ENCIN_FS 0.7V ENC_C_IN BIAS BIAS CLAMP CLAMP CLAMP/BIAS CLAMP CLAMP CLAMP FILTER
VGA 5dB, 6dB, OR 7dB TV_R/C_OUT PULLDOWN TVRCOUT N
VGA 5dB, 6dB, OR 7dB TV_G_OUT
VGA 5dB, 6dB, OR 7dB FILTER TV_B_OUT
x2
TV_Y/CVBS_OUT
MAX9595
0V x1 5V FILTER 2k MIXER 2k x2 V12 RF_CVBS_OUT TVOUT_FS
TV_SS VCR_SS
SW/MONITOR
INTERRUPT_OUT
Figure 1. MAX9595 Video Section Functional Diagram ______________________________________________________________________________________ 11
Audio/Video Switch for Dual SCART Connector MAX9595
Video Inputs
All video inputs are AC-coupled with an external 0.1F capacitor. Either a clamp or bias circuit sets the DC input level of the video signals. The clamp circuit positions the sync tip of the composite (CVBS), the component RGB, or the S-video luma signal. If the signal does not have a sync tip, then the clamp positions the minimum of the signal at the clamp voltage. The bias circuitry is used to position the S-video chroma signal at midlevel of the luma (Y) signal. On the video inputs that can receive either a chroma or a red video signal, the bias or clamp circuit is selected through I2C. See Tables 3-12 for loading register details. The MPEG decoder and VCR uses the RGB format and fast switching to insert an on-screen display (OSD), usually text, onto the TV. The MAX9595 supports RGB as an input from either the VCR or the MPEG decoder and as an output only to the TV. The red video signal of the RGB format and the chroma video signal of the S-VHS format share the same SCART connector pin. Therefore, RGB and S-video signals cannot be present at the same time. Loop-through is possible with a composite video signal but not with RGB signals because the RGB SCART pins are used for both input and output. In SCART, there is the possibility of a bidirectional use of the red/chroma pin. When using the red/chroma pin as an input port, terminate the red/chroma output with a 75 resistor to ground. Thus, a ground state is provided by an active pulldown to GNDVID on the red/chroma output to support the bidirectional chroma or red I/O, turning the output source resistors into terminations (see Figure 2). The active pulldown also provides the "Mute Output" function, and disables the deselected video outputs. The "Mute Output" state is the default power-on state for video. For high-quality home video, the MPEG decoder, VCR, and TV use the S-video format. The MAX9595 supports S-video signals as an input from the VCR, the MPEG decoder, and the TV, and also as a separately switchable output to the TV and VCR. Because S-video support was not included in the original specifications of the SCART connector, the luma (Y) signal of S-video and the CVBS signal share the same SCART connector pins. If S-video is present, then a composite signal must be created from the Y and C signals to drive the RF_CVBS_OUT pin. For S-video, loop-through is not possible since the chroma SCART port is used for both input and output. The MAX9595 supports composite video (CVBS) format, with inputs from the VCR, MPEG decoder, and TV. Full loop-through is possible to the TV and VCR only, since the MPEG decoder SCART connector has separate input and output pins for the CVBS format.
0.1F
0.1F
MAX9595
TV_R/C_OUT 75 PIN 15 PIN 15 75
MAX9595
TV_R/C_OUT
N
PIN 13
PIN 13
N
PULLDOWN TV_R/C_IN CLAMP/BIAS VIDEO INPUT CLAMP
SCART CABLE
PULLDOWN TV_R/C_IN
SCART CONNECTORS
CLAMP/BIAS VIDEO INPUT CLAMP
Figure 2. Bidirectional SCART Pins
12
______________________________________________________________________________________
Audio/Video Switch for Dual SCART Connector
Video Outputs
The DC level at the video outputs is controlled so that coupling capacitors are not required, and all of the video outputs are capable of driving a DC-coupled, 150, back-terminated coax load with respect to ground. Since some televisions and VCRs use the horizontal sync height for automatic gain control, the MAX9595 accurately reproduces the sync height to within 2%.
Fast Switching
The VCR or MPEG decoder outputs a fast-switching signal to the display device or TV to insert on-screen display (OSD). The fast-switching signal can also be set to a constant high or low output signal through the I 2C interface. The fast-switching output can be set through writing to register 07h.
MAX9595
Y/C Mixer
The MAX9595 includes an on-chip mixer to produce composite video (CVBS) when S-video (Y and C) is present. The composite video drives the RF_CVBS_OUT output pin. The circuit sums Y and C signals to obtain the CVBS component. A +6dB output buffer drives RF_CVBS_OUT.
Slow Switching
The MAX9595 supports the IEC 933-1, Amendment 1, tri-level slow switching that selects the aspect ratio for the display (TV). Under I2C-compatible control, the MAX9595 sets the slow-switching output voltage level. Table 1 shows the valid input levels of the slow-switching signal and the corresponding operating modes of the display device. Two bidirectional ports are available for slow-switching signals for the TV and VCR. The slow-switching input status is continuously read and stored in register 0Eh. The slow-switching outputs can be set to a logic level or high impedance by writing to registers 07h and 09h. See Tables 8 and 10 for details. When enabled, INTERRUPT_OUT becomes high impedance if the voltage level changes on TV_SS or VCR_SS.
Video Reconstruction Filter
The encoder DAC outputs need to be lowpass-filtered to reject the out-of-band noise. The MAX9595 integrates the reconstruction filter. The filter is fourth order, which is composed of two Sallen-Key biquad in cascade, implementing a Butterworth-type transfer function. The internal reconstruction filters feature a 6MHz cutoff frequency, and -35dB minimum attenuation at 27MHz. Note that the SET pin is used to set the accuracy of the filter cutoff frequency. Connect a 100k resistor from SET to ground.
Table 1. Slow-Switching Modes
SLOW-SWITCHING SIGNAL VOLTAGE (V) MODE
SCART Audio Switching
Audio Inputs The audio block has three stereo audio inputs from the TV, the VCR, and the MPEG decoder SCART. Each input has a 100k resistor connected to an internally generated voltage equal to 0.23 x V12, and is AC-coupled.
0 to 2
Display device uses an internal source such as a built-in tuner to provide a video signal Display device uses a video signal from the SCART connector and sets the display to 16:9 aspect ratio Display device uses a signal from the SCART connector and sets the display to 4:3 aspect ratio
4.5 to 7.0
9.5 to 12.6
______________________________________________________________________________________
13
Audio/Video Switch for Dual SCART Connector MAX9595
Audio Outputs Both right and left channels have a stereo output for the TV and VCR SCART. The monaural output, which is a mix of the TV right and left channels, drives the RF modulator, RF_MONO_OUT. The monaural mixer, a resistor summer, attenuates the amplitude of each of the two signals by 6dB. A 12.54dB gain block follows the monaural mixer. If the left and right audio channels were completely uncorrelated, then a 9.54dB gain block is used. See Figure 3 for the functional diagram of the audio section. Clickless Switching The TV channel incorporates a zero-crossing detect (ZCD) circuit that minimizes click noise due to abrupt signal level changes that occur when switching between audio signals at an arbitrary moment.
AUDIO INPUTS
ZCD
AUDIO OUTPUTS
ENC_INL TV_INL VCR_INL MUTE
VOLUME CONTROL BYPASS 9.54dB VOLUME CONTROL +6dB TO -56dB /2 TV_OUTL MUTE 12.54dB RF_MONO_OUT VOLUME CONTROL BYPASS MUTE 9.54dB VOLUME CONTROL +6dB TO -56dB TV_OUTR MUTE GNDAUD I2C
ENC_INR TV_INR VCR_INR MUTE
9.54dB -6dB, 0dB, OR +6dB VCR_OUTL
MUTE
9.54dB -6dB, 0dB, OR +6dB VCR_OUTR
MUTE MUTE IS AN INTERNAL SIGNAL
Figure 3. MAX9595 Audio Section Functional Diagram
14
______________________________________________________________________________________
Audio/Video Switch for Dual SCART Connector
To implement the zero-crossing function when switching audio signals, set the ZCD bit by loading register 00h through the I2C-compatible interface (if the ZCD bit is not already set). Then set the mute bit low by loading register 00h. Next, wait for a sufficient period of time for the audio signal to cross zero. This period is a function of the audio signal path's low-frequency 3dB corner (fL3dB). Thus, if fL3dB = 1kHz, the time period to wait for a zero-crossing detect is 0.5kHz or 0.5ms. Next, set the appropriate TV switches using register 01h. Finally, clear the mute bit (while leaving the ZCD bit high) using register 00h. The MAX9595 switches the signal out of mute at the next zero crossing. To implement the zero-cross function for TV volume changes, or for TV and phono volume bypass switching, simply ensure the ZCD bit in register 00h is set. Volume Control The TV channel volume control ranges from -56dB to +6dB in 2dB steps. The VCR volume control settings are programmable for -6dB, 0dB, and +6dB. These gain levels are referenced to the application inputs, where some dividers are present. With the ZCD bit set, the TV volume control switches only at zero-crossings, thus minimizing click noise. The TV outputs can bypass the volume control. Likewise, the monaural output signal can be processed by the TV volume control or it can bypass the volume control.
Digital Section
Serial Interface The MAX9595 uses a simple 2-wire serial interface requiring only two standard microprocessor port I/O lines. The fast-mode I 2C-compatible serial interface allows communication at data rates up to 400kbps or 400kHz. Figure 4 shows the timing diagram of the signals on the 2-wire interface. The two bus lines (SDA and SCL) must be at logic-high when the bus is not in use. The MAX9595 is a slave device and must be controlled by a master device. Pullup resistors from the bus lines to the supply are required when push-pull circuitry is not driving the lines. The logic level on the SDA line can only change when the SCL line is low. The start and stop conditions occur when SDA toggles low/high while the SCL line is high (see Figure 5). Data on SDA must be stable for the duration of the setup time (tSU,DAT) before SCL goes high. Data on SDA is sampled when SCL toggles high with data on SDA stable for the duration of the hold time (tHD,DAT). Note that data is transmitted in an 8-bit byte. A total of nine clock cycles are required to transfer a byte to the MAX9595. The device acknowledges the successful receipt of the byte by pulling the SDA line low during the 9th clock cycle.
MAX9595
SDA tSU,DAT tLOW SCL tHD,STA tR START CONDITION tF REPEATED START CONDITION STOP CONDITION tHD,DAT tSU,STA tHD,STA tSU,STA tBUF
Figure 4. SDA and SCL Signal Timing Diagram
______________________________________________________________________________________
15
Audio/Video Switch for Dual SCART Connector MAX9595
2-Wire Interface Data Format
Programming
Connect DEV_ADDR to ground to set the MAX9595 write and read address as shown in Table 2.
Write and Read Mode
S Slave Address A Register Address A Data2 A P
Table 2. Slave Address Programming
ADDRESS PIN STATE VVID GNDVID WRITE ADDRESS 96h 94h READ ADDRESS 97h 95h
S = Start Condition, A = Acknowledge, P = Stop Condition
I2C Compatibility
The MAX9595 is compatible with existing systems. SCL and SDA are high-impedance inputs. SDA has an open drain that pulls the bus line to a logic-low during the 9th clock pulse. Figure 5 shows a typical I2C interface application. The communication protocol supports the standard I2C 8-bit communications. The MAX9595 address is compatible with the 7-bit I 2C addressing protocol only; 10-bit format is not supported. I2C
Data Register Writing and Reading
Program the SCART video and audio switches by writing to registers 00h through 0Dh. Registers 00h through 0Eh can also be read, allowing read-back of data after programming and facilitating system debugging. The status register is read-only and can be read from address 0Eh. See Tables 3-12 for register programming information.
Digital Inputs and Interface Logic
The I2C-compatible, 2-wire interface has logic levels defined as VIL = 0.8V and VIH = 2.0V. All of the inputs include Schmitt-trigger buffers to accept low-transition interfaces. The digital inputs are compatible with 3V CMOS logic levels.
INTERRUPT_OUT Signal
INTERRUPT_OUT is an open-drain output that becomes high impedance when a change in any of the slow-switch signals occurs. Clear INTERRUPT_OUT by setting bit 4 of register 01h low.
Applications Information
C SDA SCL
Hot-Plug of SCART Connectors
The MAX9595 features high-ESD protection on all SCART inputs and outputs, and requires no external transient-voltage suppressor (TVS) devices to protect against floating chassis discharge. Some set-top boxes have a floating chassis problem in which the chassis is not connected to earth ground. As a result, the chassis can charge up to 500V. When a SCART cable is connected to the SCART connector, the charged chassis can discharge through a signal pin. The equivalent circuit is a 2200pF capacitor charged to 311V connected through less than 0.1 to a signal pin. The MAX9595 is soldered on the PC board when it experiences such a discharge. Therefore, the current spike flows through the ESD protection diodes and is absorbed by the supply bypass capacitors, which have high capacitance and low ESR. To better protect the MAX9595 against excess voltages during the cable discharge condition, place an additional 75 resistor in series with all inputs and outputs to the SCART connector. For harsh environments where 15kV protection is needed, the MAX4385E and MAX4386E single and quad high-speed op amps feature the industry's first integrated 15kV ESD protection on video inputs and outputs.
SCL MAX9595 SDA
VVID
SCL DEVICE 1 SDA
VDD
SCL DEVICE 2 SDA
VDD
Figure 5. Typical I2C Interface Application 16
______________________________________________________________________________________
Audio/Video Switch for Dual SCART Connector
Power Supplies and Bypassing
The MAX9595 features single 5V and 12V supply operation and requires no negative supply. The +12V supply V12 is for the SCART switching function. For pin V 12, place all bypass capacitors as close as possible with a 10F capacitor in parallel with a 0.1F ceramic capacitor. Connect all VAUD pins together to +5V and bypass with a 10F electrolytic capacitor in parallel with a 0.47F lowESR ceramic capacitor to audio ground. Bypass VAUD pins with a 0.1F capacitor to audio ground. Bypass AUD_BIAS to audio ground with a 10F electrolytic in parallel with a 0.1F ceramic capacitor. Bypass VDIG with a 0.1F ceramic capacitor to digital ground. Bypass each VVID to video ground with a 0.1F ceramic capacitor. Connect VVID in series with a 200nH ferrite bead to the +5V supply.
Layout and Grounding
For optimal performance, use controlled-impedance traces for video signal paths and place input termination resistors and output back-termination resistors close to the MAX9595. Avoid routing video traces parallel to high-speed data lines. The MAX9595 provides separate ground connections for video, audio, and digital supplies. For best performance, use separate ground planes for each of the ground returns and connect all three ground planes together at a single point. Refer to the MAX9595 evaluation kit for a proven circuit board layout example.
MAX9595
Table 3. Data Format for Write Mode
REGISTER ADDRESS (HEXADECIMAL) 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh VCR_Y/ CVBS_OUT enable VCR_R/ C_OUT enable TV_R/C_OUT enable TV_R/C_IN clamp Not used VCR_R/ C_IN clamp Not used RGB gain TV_Y/ RF_CVBS_ OUT switch CVBS_OUT switch Not used Not used Not used Not used BIT 7 TV volume bypass BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 TV audio output mute TV audio selection
ZCD Not used
TV volume control Interrupt enable Not used Not used Not used Not used TV G and B video switch TV fast blank (fast switching) Not used Not used ENC_R/ C_IN clamp Not used VCR audio selection
VCR volume control
TV video switch TV_R/C_OUT ground Set function TV
VCR video switch VCR_R/C_OUT ground Set function VCR
Not used Not used Not used TV_G_OUT TV_B_OUT enable enable TV_Y/ CVBS_OUT enable TVOUT_ FS enable RF_CVBS_ OUT enable
______________________________________________________________________________________
17
Audio/Video Switch for Dual SCART Connector MAX9595
Table 4. Data Format for Read Mode
REGISTER ADDRESS (HEXADECIMAL) 0Eh BIT 7 BIT 6 Power-on reset BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Thermal SHDN
Not used
VCR slow switch input
TV slow switch input
Table 5. Register 00h: TV Audio Control
DESCRIPTION TV Audio Mute 0 0 0 TV Volume Control 0 0 0 1 1 TV Zero-Crossing Detector 0 1 0 1 0 0 0 0 0 0 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 BIT 7 6 5 4 3 2 1 0 0 1 Off On (power-on default) +6dB gain +4dB gain +2dB gain 0dB gain (power-on default) -2dB gain -4dB gain -54dB gain -56dB gain Off On (power-on default) TV audio passes through volume control (power-on default) TV audio bypasses volume control COMMENTS
TV Volume Bypass
18
______________________________________________________________________________________
Audio/Video Switch for Dual SCART Connector MAX9595
Table 6. Register 01h: TV/VCR Audio Control
DESCRIPTION BIT 7 6 5 4 3 2 1 0 Input Source for TV Audio 0 1 1 0 Input Source for VCR Audio 0 1 1 Interrupt Enable 0 VCR Volume Control 0 1 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 VCR audio TV audio Mute (power-on default) Encoder audio VCR audio TV audio Mute (power-on default) Clear INTERRUPT_OUT (power-on default) Enable INTERRUPT_OUT 0dB gain (power-on default) +6dB gain -6dB gain 0dB gain COMMENTS Encoder audio
______________________________________________________________________________________
19
Audio/Video Switch for Dual SCART Connector MAX9595
Table 7. Register 06h: TV Video Input Control
DESCRIPTION BIT 7 6 5 4 3 2 0 0 0 0 Input Sources for TV Video 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 COMMENTS TV_Y/CVBS_OUT ENC_Y/CVBS_IN ENC_Y_IN VCR_Y/CVBS_IN TV_Y/CVBS_IN Not used Mute Mute Mute (power-on default) TV_G_OUT 0 0 Input Sources for TV_G_OUT and TV_B_OUT 1 1 0 RGB Gain 0 1 1 TV_R/C_IN Clamp/Bias 0 1 0 1 0 1 0 1 0 1 ENC_G_IN VCR_G_IN Mute Mute (power-on default) 6dB (power-on default) 7dB 5dB 5dB DC restore clamp active at input (power-on default) Chrominance bias applied at input TV_R/C_OUT ENC_R/C_IN ENC_C_IN VCR_R/C_IN TV_R/C_IN Not used Mute Mute Mute (power-on default) TV_B_OUT ENC_B_IN VCR_B_IN Mute Mute (power-on default)
20
______________________________________________________________________________________
Audio/Video Switch for Dual SCART Connector MAX9595
Table 8. Register 07h: TV Video Output Control
DESCRIPTION BIT 7 6 5 4 3 2 1 0 0 Set TV Function Switching 1 1 0 TV_R/C_OUT Ground 1 0 Fast Blank (Fast Switching) 0 1 1 0 TV_Y/CVBS_OUT Switch 1 0 RF_CVBS_OUT Switch 1 The TV_Y/CVBS_OUT signal selected in register 06h is output 0 1 0 1 0 0 1 0 1 COMMENTS Low (< 2V), internal source (power-on default) Medium (4.5V to 7V), external SCART source with 16:9 aspect ratio High impedance High (> 9.5V), external SCART source with 4:3 aspect ratio Normal operation, pulldown on TV_R/C_OUT is off (power-on default) Ground, pulldown on TV_R/C_OUT is on, the output amplifier driving TV_R/C_OUT is turned off 0V (power-on default) Same level as ENC_FB_IN Same level as VCR_FB_IN VVID Composite video from the Y/C mixer is output The TV_Y/CVBS_OUT signal selected in register 06h is output (power-on default) Composite video from the Y/C mixer is output (power-on default)
Table 9. Register 08h: VCR Video Input Control
DESCRIPTION BIT 7 6 5 4 3 2 0 0 0 Input Sources for VCR Video 0 1 1 1 1 VCR_R/C_IN Clamp/Bias ENC_R/C_IN Clamp/Bias 0 1 0 1 1 0 0 1 1 0 0 1 1 0 VCR_Y/CVBS_OUT 0 1 0 1 0 1 0 1 ENC_Y/CVBS_IN ENC_Y_IN VCR_Y/CVBS_IN TV_Y/CVBS_IN Not used Mute Mute Mute (power-on default) COMMENTS VCR_R/C_OUT ENC_R/C_IN ENC_C_IN VCR_R/C_IN TV_R/C_IN Not used Mute Mute Mute (power-on default)
DC restore clamp active at input (power-on default) Chrominance bias applied at input DC restore clamp active at input (power-on default) Chrominance bias applied at input
______________________________________________________________________________________
21
Audio/Video Switch for Dual SCART Connector MAX9595
Table 10. Register 09h: VCR Video Output Control
DESCRIPTION BIT 7 6 5 4 3 2 1 0 0 Set VCR Function Switching 1 1 0 VCR_R/C_OUT Ground 1 0 0 1 0 1 COMMENTS Low (< 2V), internal source (power-on default) Medium (4.5V to 7V), external SCART source with 16:9 aspect ratio High impedance High (> 9.5V), external SCART source with 4:3 aspect ratio Normal operation, pulldown on VCR_R/C_OUT is off (power-on default) Ground, pulldown on VCR_R/C_OUT is on, the output amplifier driving VCR_R/C_OUT is turned off
Table 11. Register 0DH: Output Enable
DESCRIPTION RF_CVBS_OUT TVOUT_FS TV_Y/CVBS_OUT TV_B_OUT TV_G_OUT TV_R/C_OUT VCR_R/C_OUT VCR_Y/CVBS_OUT 0 1 0 1 0 1 0 1 0 1 0 1 0 1 BIT 7 6 5 4 3 2 1 0 0 1 On Off (power-on default) On Off (power-on default) On Off (power-on default) On Off (power-on default) On Off (power-on default) On Off (power-on default) On Off (power-on default) On COMMENTS Off (power-on default)
22
______________________________________________________________________________________
Audio/Video Switch for Dual SCART Connector MAX9595
Table 12. Register 0Eh Status
DESCRIPTION BIT 7 6 5 4 3 2 1 0 TV Slow Switch Input 0 VCR Slow Switch Input 0 1 0 1 0 1 1 Power-On Reset Thermal Shutdown 0 1 0 1 0 1 1 0 0 1 0 1 COMMENTS 0 to 2V, internal source 4.5V to 7V, external source with 16:9 aspect ratio Not used 9.5V to 12.6V, external source with 4:3 aspect ratio 0 to 2V, internal source 4.5V to 7V, external source with 16:9 aspect ratio Not used 9.5V to 12.6V, external source with 4:3 aspect ratio VVID is too low for digital logic to operate VVID is high enough for digital logic to operate The part is in thermal shutdown The temperature is below the TSHD limit
______________________________________________________________________________________
23
Audio/Video Switch for Dual SCART Connector MAX9595
Typical Application Circuit
ENC_Y/CVBS_IN_SC VCR_Y/CVBS_IN_SC
TV_Y/CVBS_IN_SC
ENC_R/C_IN_SC
VCR_R/C_IN_SC
ENC_C_IN_SC
48
47
46
45
44
43
42
VCR_B_IN_SC
41
VCR_G_IN_SC
ENC_B_IN_SC
40
39
38
37
TV_R/C_IN_SC
ENC_Y_IN_SC
ENC_B_IN_SC
VVID 0.1F 10F
ENC_B_IN
VCR_Y/CVBS_IN
TV_Y/CVBS_IN
ENC_G_IN
ENC_R/C_IN
SDA
1
SDA
ENC_Y/CVBS_IN
VCR_R/C_IN
TV_R/C_IN
ENC_C_IN
ENC_Y_IN
VCR_G_IN
VCR_B_IN
VVID
36
SCL DEV_ADDR 4.7k VVID 4.7k INTERRUPT_OUT 4.7k ENC_INR_SC 4.7k ENC_INL_SC 4.7k
2 3 4
SCL DEV_ADDR ENC_INL
VCR_R/C_OUT VCR_Y/CVBS_OUT TV_B_OUT
35 34 33
VCR_R/C_OUT_SC VCR_Y/CVBS_OUT_SC TV_B_OUT_SC
5 6
INTERRUPT_OUT ENC_INR
TV_G_OUT TV_R/C_OUT
32 31
TV_G_OUT_SC TV_R/C_OUT_SC
7 6.6k VCR_INR_SC 3.3k 6.6k VCR_INL_SC 3.3k 6.6k TV_INR_SC 3.3k 6.6k 3.3k 12 10 9 8
N.C. VCR_INR
MAX9595
TV_Y/CVBS_OUT RF_CVBS_OUT
30 29
TV_Y/CVBS_OUT_SC RF_CVBS_OUT_SC
VCR_INL
GNDVID
28
TV_INR
TVOUT_FS
27
TVOUT_FS_SC ENCIN_FS
TV_OUTL
TV_OUTR
TV_SS
VCR_SS
GNDAUD
RF_MONO_OUT
TV_INL_SC
11
TV_INL
ENCIN_FS
26
VCR_OUTR
VCR_OUTL
AUD_BIAS
VCRIN_FS
25 VCRIN_FS
VAUD
13
14 10F 0.1F
15 10F
16 10F
17 10F
18 10F
19
20
V12
21
22
SET
23
VCR_OUTR_SC
VCR_OUTL_SC
RF_MONO_OUT_SC
47F
TV_OUTR_SC
TV_OUTL_SC
VCR_SS
TV_SS
10k
V12
10k
100k
VVID
VAUD
0.1F 10F 10F
0.1F 10F
VVID
24 0.1F
ALL CAPACITORS ARE 0.1F AND ALL RESISTORS ARE 75, UNLESS OTHERWISE NOTED.
24
______________________________________________________________________________________
Audio/Video Switch for Dual SCART Connector
System Block Diagram
MAX9595
V12 12V RGB VIDEO ENCODER CVBS, Y-C FAST SWITCHING
VVID 5V
VAUD 5V RGB
MAX9595
CVBS/Y SWITCHES AND FILTERS
CVBS, Y-C R/L AUDIO SLOW SWITCHING FAST SWITCHING TV SCART CONNECTOR
AUDIO DAC
R/L AUDIO RGB AND CHROMA SWITCHES AND FILTERS
ADDRESS SCL C SDA INTERRUPT_OUT RF_CVBS RF MOD MONO AUDIO GNDAUD
RGB CVBS, Y-C
AUDIO SWITCHES
R/L AUDIO SLOW SWITCHING
VCR SCART CONNECTOR
SLOW AND FAST SWITCHING EP GNDVID
FAST SWITCHING
______________________________________________________________________________________
25
Audio/Video Switch for Dual SCART Connector MAX9595
Pin Configuration
TOP VIEW VCR_Y/CVBS_OUT TV_Y/CVBS_OUT RF_CVBS_OUT VCR_R/C_OUT TV_R/C_OUT
TV_G_OUT
TV_B_OUT
TVOUT_FS
ENCIN_FS
36 35 34 33 32 31 30 29 28 27 26 25 TV_R/C_IN TV_Y/CVBS_IN VCR_Y/CVBS_IN VCR_R/C_IN VCR_G_IN VCR_B_IN ENC_Y/CVBS_IN ENC_R/C_IN ENC_G_IN ENC_B_IN ENC_Y_IN ENC_C_IN 37 38 39 40 41 42 43 44 45 46 47 48 1 SDA 2 SCL 3 DEV_ADDR 4 ENC_INL 5 INTERRUPT_OUT 6 ENC_INR 7 N.C. 8 VCR_INR 9 VCR_INL 10 11 12 TV_INR TV_INL GNDAUD 24 23 22 21 20 19 VVID SET VCR_SS TV_SS V12 TV_OUTR TV_OUTL RF_MONO_OUT VCR_OUTL VCR_OUTR VAUD AUD_BIAS
MAX9595
VCRIN_FS 18 17 16 15 14 13
THIN QFN
Chip Information
TRANSISTOR COUNT: 13,265 PROCESS: BiCMOS
26
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GNDVID
VVID
Audio/Video Switch for Dual SCART Connector
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX9595
E E/2
DETAIL A
(NE-1) X e
k e D/2
D
(ND-1) X e
C L
D2
D2/2
b L E2/2 DETAIL B e L k
C L
E2
C L
C L
L1
L e e
L
A1
A2
A
PACKAGE OUTLINE 32, 44, 48, 56L THIN QFN, 7x7x0.8mm
21-0144
E
1
2
______________________________________________________________________________________
32, 44, 48L QFN.EPS
27
Audio/Video Switch for Dual SCART Connector MAX9595
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE 32, 44, 48, 56L THIN QFN, 7x7x0.8mm
21-0144
E
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
28 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2006 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

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