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 NTE9370 Integrated Circuit HTL, Quad D-Type Flip-Flop
Description: Four D-type flip-flops utilizing a common clock line make up the NTE9370. Each flip-flop has complimentary passive pull up outputs with a single D input. This circuit is ideal as a quad latch for temporary storage of 4-bit binary numbers. Data is transferred from D inputs to outputs when the clock line is low. With the clock line high, output data is held and D inputs are ignored. Absolute Maximum Ratings: Supply Voltage: Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V Pulsed (< 0.1sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 16.5V Voltage Applied to Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +16.5V Continuous Sink Current (TA = +25C): Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mA Surge (< 1sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Output Short Circuit Duration to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Operating Temperature Range, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -30 to +85C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to +100C Lead Temperature (During Soldering, 1/16" from case, 10sec max), TL . . . . . . . . . . . . . . . . . +300C Electrical Characteristics: (VCC = 12V 1V unless otherwise specified)
Parameter Input Threshold Voltage, Low Input Threshold Voltage, High Input Current, Low (1 Unit Load) Input Leakage Current (1 Unit Load) Output Low Voltage Output High Voltage Test Supply Voltage Symbol VIL VIH IIL IIH VOL VOH VCC Test Conditions Guaranteed input low threshold for all inputs Guaranteed input high threshold for all inputs VCC = Max, VIN = VOL1 max VCC = Max, VIN = VCC VCC = Min, VIL = 5V VIH = 6.5V, IOL = F.O. x U.L. Min 5 - - - - 10 11 Typ - - - - - - 12 Max Unit - 6.5 2.1 10 1.5 - 13 V V mA A V V V
Note 1. F.O. is fanout in unit loads (U.L.). A unit load is defined by the above input specifications.
Truth Table
Pin Connection Diagram
C1 C 1 1 0 0 D Qn + 1 1 0 1 0 Qn Qn 1 0 Q1 2 Q1 3 D1 4 D2 5 Q2 6 Q2 7 GND 8 Pins D C Q, Q Function Data Inputs Clock Input Outputs
16 VCC 15 Q4 14 Q4 13 D4 12 D3 11 Q3 10 Q3 9 N.C. Loading 2 UL 1 UL 5 UL at 1.5V
16
9
1
8
.870 (22.0) Max .200 (5.08) Max
.260 (6.6) Max
.100 (2.54) .700 (17.78)
.099 (2.5) Min


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