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| 74VHCT540A Octal Buffer/Line Driver with 3-STATE Outputs June 1997 Revised April 1999 74VHCT540A Octal Buffer/Line Driver with 3-STATE Outputs General Description The VHCT540A is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The VHCT540A is an octal buffer/line driver designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/receivers. This device is similar in function to the VHCT240A while providing flow-through architecture (inputs on opposite side from outputs). This pinout arrangement makes this device especially useful as an output port for microprocessors, allowing ease of layout and greater PC board density. Protection circuits ensure that 0V to 7V can be applied to the input and output (Note 1) pins without regard to the supply voltage. This device can be used to interface 3V to 5V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages. Note 1: Outputs in OFF-STATE Features s High Speed: tPD = 5.4 ns (typ) at VCC = 5V s Low Power Dissipation: ICC = 4 A (max) at TA = 25C s Power down protection is provided on all inputs and outputs s Pin and function compatible with 74HCT540 Ordering Code: Order Number 74VHCT540AM 74VHCT540ASJ 74VHCT540AMTC 74VHCT540AN Package Number M20B M20D MTC20 N20A Package Dissipation 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Pin Names OE1, OE2 I0 - I7 O0 - O7 Description 3-STATE Output Enable Inputs Inputs 3-STATE Outputs Truth Table Inputs OE1 L H X L H = HIGH Voltage Level L = LOW Voltage Level OE2 L X H L Outputs I H X X L L Z Z H X = Immaterial Z = High Impedance (c) 1999 Fairchild Semiconductor Corporation DS500012.prf www.fairchildsemi.com 74VHCT540A Absolute Maximum Ratings(Note 2) Supply Voltage (VCC ) DC Input Voltage (VIN) DC Output Voltage (VOUT) (Note 3) (Note 4) Input Diode Current (IIK) Output Diode Current (IOK) (Note 5) DC Output Current (IOUT) DC VCC/GND Current (ICC) Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 260C 20 mA 25 mA 75 mA -65C to +150C -0.5V to +7.0V -0.5V to VCC + 0.5V -20 mA -0.5V to +7.0V -0.5V to +7.0V Recommended Operating Conditions (Note 6) Supply Voltage (VCC) Input Voltage (VIN) Output Voltage (VOUT) (Note 4) (Note 3) Operating Temperature (TOPR) Input Rise and Fall Time (tr, tf) VCC = 5.0V 0.5V 0 20 ns/V Note 2: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. Note 3: When outputs are in OFF-STATE or when VCC = OV. Note 4: HIGH or LOW state. IOUT absolute maximum rating must be observed. Note 5: VOUT 4.5V to +5.5V 0V to +5.5V 0V to VCC 0V to 5.5V -40C to +85C DC Electrical Characteristics Symbol VIH VIL VOH VOL IOZ IIN ICC ICCT IOFF Parameter VCC (V) 4.5 - 5.5 4.5 4.5 4.5 4.5 5.5 0 - 5.5 5.5 5.5 0 4.4 3.94 0.0 0.1 0.36 0.25 0.1 4.0 1.35 0.5 4.5 TA = 25C Min 2.0 0.8 4.4 3.80 0.1 0.44 2.5 1.0 40.0 1.50 5.0 Typ Max TA = -40C to +85C Min 2.0 0.8 Max Units V V V V V V A A A mA A VIN = VIH VIN = VIH IOH = -50 A IOL = 50 A or VIL IOH = -8 mA or VIL IOL = 8 mA VIN = VIH or VIL VOUT = VCC or GND VIN = 5.5V or GND VIN = VCC or GND VIN = 3.4V other inputs = VCC or GND VOUT = 5.5V Conditions HIGH Level Input Voltage 4.5 - 5.5 LOW Level Input Voltage HIGH Level Output Voltage LOW Level Output Voltage 3-STATE Output OFF-STATE Current Input Leakage Current Quiescent Supply Current Maximum ICC/input Output Leakage Current Noise Characteristics Symbol VOLP (Note 7) VOLV (Note 7) VIHD (Note 7) VILD (Note 7) Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum HIGH Level Dynamic Input Voltage VCC (V) 5.0 5.0 5.0 5.0 TA = 25C Typ 1.2 -1.2 Limits 1.6 1.6 2.0 0.8 Units V V V V CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF Conditions Note 7: Parameter guaranteed by design. www.fairchildsemi.com 2 74VHCT540A AC Electrical Characteristics Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ tOSLH tOSHL CIN COUT CPD Parameter Propagation Delay Time 3-STATE Output Enable Time 3-STATE Output Disable Time Output to Output Skew Input Capacitance Output Capacitance Power Dissipation Capacitance VCC (V) 5.0 0.5 5.0 0.5 5.0 0.5 5.0 0.5 4 9 19 TA = 25C Min Typ 5.4 5.9 8.3 8.8 9.4 Max 7.4 8.4 11.3 12.3 11.9 1.0 10 TA = -40C to +85C Min 1.0 1.0 1.0 1.0 1.0 Max 8.5 9.5 13.0 14.0 13.5 1.0 10 Units ns ns ns ns pF pF pF RL = 1 k Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF RL = 1 k CL = 50 pF (Note 8) CL = 50 pF VCC = Open VCC = 5.0V (Note 9) Note 8: Parameter guaranteed by design. tOSLH = |tPLHmax - t PLHmin|; tOSLH = |tPHLmax - tPHLmin|. Note 9: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) = CPD * VCC * fIN + ICC/8 (per bit). 3 www.fairchildsemi.com 74VHCT540A Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 4 74VHCT540A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 5 www.fairchildsemi.com 74VHCT540A Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. |
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