Part Number Hot Search : 
SAS2208 FU5305 XXX3XX CA1F2 52N60 1N392 SA15A DTA143E
Product Description
Full Text Search
 

To Download LT1684 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 Final Electrical Specifications
LT1684 Micropower Ring Tone Generator
February 1999
FEATURES
s s
DESCRIPTION
The LT(R)1684 is a telecommunication ring tone generator. The IC takes a user-generated pulse width modulated (PWM) input and converts it to a high voltage sine wave suitable for telephone ringing applications. The LT1684 receives capacitor-isolated differential PWM input signals encoded with desired ring output cadence, frequency, and amplitude information. The LT1684 normalizes the pulse amplitude to 1.25V for an accurate signal voltage reference. The cadence, frequency and amplitude information is extracted using a multiplepole active filter/amplifier, producing the output ring tone signal. The LT1684 uses its own ring tone output as a reference for generating local supply rails employing complementary high voltage external MOSFETs as dynamic levelshifting devices. This "active tracking" supply mode of operation allows linear generation of the high voltage ring tone signal, reducing the need for large high voltage filtering elements.
s s s
s s s
s s
Allows Dynamic Control of Output Frequency, Cadence, Amplitude and DC Offset Active Tracking Supply Configuration Allows Linear Generation of Ring Tone Signal No High Voltage Post-Filtering Required Capacitive Isolation Eliminates Optocouplers Low Distortion Output Meets International PTT Requirements Differential Input Signal for Noise Immunity User Adjustable Active Output Current Limit Powered Directly From High Voltage Ringer Supply--No Additional Supplies Necessary 2% Signal Amplitude Reference Available in 14-Pin SO and DIP Packages
APPLICATIONS
s s s
Wireless Local Loop Telephones Key System/PBX Equipment Fiber to the Curb Telecom Equipment
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
DC ISOLATION 100pF P1 C P2 100pF
10k IN A 10k IN B
6.8nF GATE +
100k IRF610 100
FMB1601 V+ 1N4001 LIM + OUT ATREF LT1684 100pF COMP1 0.1F 20pF
BGOUT
3k
2k 300k
5k AMPIN 4700pF
COMP2 LIM - V- GATE-
1N5817
100 IRF9610 6.8nF 100k -100V
1F
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
U
U
+100V
+ RING TONE OUTPUT -
1684 TA01
1
LT1684
ABSOLUTE MAXIMUM RATINGS
Voltages: Active Tracking Differential Voltage (GATE + - GATE -) .................................. - 0.3V to 42V Local Supply Differential Voltage (V + - V -) ...............................................- 0.3V to 36V Local Supply Voltage V + .............. (GATE + - 7.0V) to (GATE + + 0.3V) Local Supply Voltage V - .............. (GATE - - 0.3V) to (GATE - + 7.0V) PWM Input Differential Voltage (IN A - IN B) ......................................... - 7.0V to 7.0V PWM Input Voltage Common Mode................. (V - - 0.3V) to (V + + 0.3V) LIM + Current Limit Pin Voltage ..................... (OUT - 0.3V) to (V+ + 0.3V) LIM- Current Limit Pin Voltage .................... (V - - 0.3V) to (OUT + 0.3V) All Other Pin Voltages ........... (V - - 0.3V) to (V + + 0.3V)
PACKAGE/ORDER INFORMATION
TOP VIEW IN B COMP1 COMP2 LIM- V- GATE- ATREF 1 2 3 4 5 6 7 14 IN A 13 BGOUT 12 AMPIN 11 GATE+ 10 V+ 9 8 LIM+ OUT
N PACKAGE 14-LEAD PDIP
S PACKAGE 14-LEAD PLASTIC SO
TJMAX = 125C, JA = 75C/W (N) TJMAX = 125C, JA = 115C/W (S)
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
V + - V - = 20V, Voltages referenced to pin OUT, TA = 25C unless otherwise noted.
SYMBOL IS |V +| |V -| PARAMETER DC Supply Current (Note 2) Local Supply Voltages CONDITIONS IN A - IN B 1.6V VGATE+ VGATE- V - V+
q q
Supply and Protection 680 6.5 10 950 A V
2
U
U
W
WW U
W
(Note 1)
Currents: LIM +, LIM - Current .......................................... - 350mA OUT Current ....................................................... 350mA BGOUT Current .................................................... 10mA PWM (IN A, IN B) Current..................................... 5mA GATE +, GATE - Current ....................................... 20mA COMP1 Current .................................................... 1mA COMP2 Current .................................................... 1mA ATREF Current ..................................................... 20mA Temperatures: Operating Junction Temperature Range Commercial Grade ................................. 0C to 125C Industrial Grade ................................ - 40C to 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LT1684CN LT1684CS LT1684IN LT1684IS
MIN
TYP
MAX
UNITS
LT1684
ELECTRICAL CHARACTERISTICS
V + - V - = 20V, Voltages referenced to pin OUT, TA = 25C unless otherwise noted.
SYMBOL VGATE+ VGATE - PARAMETER Active Tracking Supply FET Bias Voltage Active Tracking Supply FET Bias Voltage Input Carrier Frequency Minimum Valid Differential Input Differential Input Threshold | IN A - IN B | RIN RINA,INB BG Buffer VBGOUT VBGOUTOS IBGOUTSC RBGOUT tr tf tr-f tpr tpf tp BGOUT Normalized Voltage Output Offset Voltage [(VBGOUT+) + (VBGOUT -)]/2 BGOUT Short-Circuit Current BGOUT Output Impedance BGOUT Rise Time (10% to 90%) BGOUT Fall Time (10% to 90%) BGOUT RiseTime - Fall Time BGOUT Propagation Delay PWM Input Transition to 10% Output (Rising Edge) BGOUT Propagation Delay PWM Input Transition to 90% Output (Falling Edge) BGOUT Propagation Delay Rising Edge - Falling Edge OUT Offset Voltage OUT Output Impedance OUT Short-Circuit Current VAMPIN = 0v, IOUT = 0A RAMPIN = 10k (Note 4) -10mA ILIM+ -100mA, LIM + Shorted to OUT 10mA IOUT 100mA, LIM - Shorted to V - LIM + Shorted to OUT LIM - Shorted to V -
q
CONDITIONS IGATE+ = -100A, ATREF = 0V IGATE- = 100A, ATREF = 0V
q q
MIN 13.2 -14.8
TYP 14.0 -14.0
MAX 14.8 -13.2
UNITS V V
PWM Receiver fPWM VIN 10 IN A - IN B or IN B - IN A
q q
kHz V 1.00 V k k
1.6 0.50 7 50 0.70 10
Differential Input Overdrive Impedance (Note 3, 5) Single-Ended Input Impedance (Note 5)
VIN > VTH + 100mV To Pin OUT
q q
Magnitude |VBGOUT|
q q q
1.235 1.225 -7 -10 2
1.250 1.250
1.265 1.275 7 10
V V mV mV mA
4.5 0.2 160 260 300 400 0 500 600 100
- 2mA IBGOUT 2mA ROUT = 5k, COUT = 10pF ROUT = 5k, COUT = 10pF ROUT = 5k, COUT = 10pF ROUT = 5k, COUT = 10pF
q q q q q q
ns ns ns ns ns ns
- 200
-100 340 440
- 200
-100
Output Amplifier VOUTOS ROUT IOUTSC
q
-6 -8 0.01 0.15 100 190
6 8
mV mV mA
The q denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: IC Supply current specification represents unloaded condition and does not include external FET gate pull up/down currents (GATE +, GATE - pins). Actual total IC bias currents will be higher and vary with operating conditions. See Applications Information.
Note 3: PWM inputs are high impedance through 100mV beyond the input thresholds. Note 4: 10k resistor from pin AMPIN to ground. Note 5: Guaranteed but not tested.
3
LT1684 TYPICAL PERFORMANCE CHARACTERISTICS
DC Supply Current vs V+ - V-
740 720 TJ = 25C
DC SUPPLY CURRENT (A)
DC SUPPLY CURRENT (A)
IN A - IN B 1.6V 680 660 640 620 600 14 16 18 20 V + - V - (V) 22 24
1684 G01
650 630 610 590 570 550 -50 IN A - IN B -1.6V
VGATE - VATREF (V)
700
IN A - IN B -1.6V
VGATE - VATREF Voltage Magnitudes vs Temperature
14.5 14.4 14.3 IGATE = 1mA 0.85 0.80 0.75
VGATE - VATREF (V)
IN A - IN B (V)
14.2 14.1 14.0 13.9 13.8 13.7 13.6 13.5 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125
0.70 0.65 0.60 0.55 0.50 0.45 -50
VBGOUT (V)
PWM Buffer (Pin BGOUT) Current Limit vs Temperature
6.0
PWM BUFFER CURRENT LIMIT (mA)
5.5
OUTPUT CURRENT LIMIT (mA)
OUTPUT CURRENT LIMIT (mA)
5.0 4.5 4.0 3.5 3.0 2.5 2.0 -50
-25
0 25 50 75 TEMPERATURE (C)
4
UW
100
DC Supply Current vs Temperature
710 690 670 IN A - IN B 1.6V 14.3
VGATE - VATREF Voltage Magnitudes vs IGATE
TJ = 25C 14.2
14.1
14.0
13.9
13.8 -25 0 25 50 75 TEMPERATURE (C) 100 125 0.1 0.3 1.0 IGATE (mA) 3.0 10.0
1684 G03
1684 G02
PWM Input Thresholds vs Temperature
1.253 1.252 1.251 1.250 1.249 1.248 1.247 1.246
VBGOUT Magnitude vs Temperature
-25
0 25 50 75 TEMPERATURE (C)
100
125
1.245 -50
-25
0 25 50 75 TEMPERATURE (C)
100
125
1684 G04
1684 G05
1684 G06
Output Amplifier Current Limit vs Temperature (RLIM = 0)
250 225 200 175 150 125 100 -50 200
Output Amplifier Current Limit vs External Limiting Resistor Values
150
100 TYPICAL (TJ = 25C) 50 MINIMUM (TJ = 125C) 0
125
-25
0 25 50 75 TEMPERATURE (C)
100
125
0
1
2
3
456 RLIM ()
7
8
9
10
1684 G07
1684 G08
1684 G09
LT1684
PIN FUNCTIONS
IN B (Pin 1): PWM Negative Input. Input is isolated from digital source by ~100pF series capacitor. A 10k resistor can be connected to the IN B pin in series with the isolation capacitor for transient protection. The PWM receiver implements a diode forward drop of input hysteresis (relative to IN A). This hysteresis and internal signal limiting assure common mode glitch rejection with isolation capacitor mismatches up to 2:1. For maximum performance, however, effort should be made to match the two PWM input isolation capacitors. Pin IN B is differentially clamped to pin IN A through back-to-back diodes. This results in a high impedance differential input through 100mV beyond the input thresholds. 5k internal input resistors yield a 10k (nominal) differential overdrive impedance. COMP1 (Pin 2): Output Amplifier Primary Compensation. Connect a 100pF capacitor from pin COMP1 to pin OUT. COMP2 (Pin 3): Output Amplifier Secondary Compensation. Connect a 20pF capacitor from pin COMP2 to pin OUT. LIM - (Pin 4): Output Amplifier Current Sink Limit. Pin implements IOUT * R = VBE current clamp. Internal clamp resistor has a typical value of 3.5. For maximum current drive capability (190mA typical) short pin to pin V -. Reduction of current sink capability is achieved by placing additional resistance from pin LIM - to pin V -. (i.e. An external 3.5 resistance from pin LIM - to pin V - will reduce the current sinking capability of the output amplifier by approximately 50%.) V - (Pin 5): Local Negative Supply. Typically connected to the source of the active tracking supply P-channel MOSFET. V - rail voltage is GATE - self-bias voltage less the MOSFET VGS. Typical P-channel MOSFET characteristics provide ATREF - V - 10V. GATE- (Pin 6): Negative Power Supply FET Gate Drive. Pin sources current from pull-down resistor to bias gate of active tracking supply P-channel MOSFET. Self-biases to a typical value of -14V, referenced to pin ATREF. Pull-down resistor value is determined such that current sourced from the GATE - pin remains greater than 50A at minimum output signal voltage and less than 10mA at maximum output signal voltage. ATREF (Pin 7): Active Tracking Supply Reference. Typically connected to pin OUT. Pin bias current is the difference between the magnitudes of GATE + pin bias and GATE- pin bias (IATREF = IGATE + - IGATE -). OUT (Pin 8): Ring Tone Output Pin. Output of active filter amplifier/buffer. Used as reference voltage for internal functions of IC. Usually shorted to pin ATREF to generate reference for active tracking supply circuitry. Connect a 1A (1N4001-type) diode between V + and OUT and a 1A Schottky diode from V - to OUT for line transient protection. LIM+ (Pin 9): Output Amplifier Current Source Limit. Pin implements IOUT * R = VBE current clamp. Internal clamp resistor has a typical value of 3.5. For maximum current drive capability (190mA typical) short pin LIM + to pin OUT. Reduction of current source capability is achieved by placing additional resistance from pin LIM + to pin OUT. (i.e. An external 3.5 resistance from pin LIM + to pin OUT will reduce the current sourcing capability of the output amplifier by approximately 50%.) V + (Pin 10): Local Positive Supply. Typically connected to the source of the active tracking supply N-channel MOSFET. This condition should be made using a ferrite bead. Operating V + rail voltage is GATE + self-bias voltage less the MOSFET VGS. Typical N-channel MOSFET characteristics provide V + - ATREF 10V. GATE + (Pin 11): Positive Power Supply FET Gate Drive. Pin sinks current from pull-up resistor to bias gate of active tracking supply N-channel MOSFET. Self-biases to a typical value of 14V, referenced to pin ATREF. Pull-up resistor value is determined such that sink current into GATE + pin remains greater than 50A at maximum output signal voltage and less than 10mA at minimum output signal voltage. AMPIN (Pin 12): Output Amplifier Input. Connected to external filter components through series protection resistor (usually 5k). Thevenin DC resistance of external filter and protection components should be 10k for optimum amplifier offset performance. See Applications Information section.
U
U
U
5
LT1684
PIN FUNCTIONS
BGOUT (Pin 13): Normalized PWM Buffered Output. PWM differential input is amplitude normalized to 1.25V (referenced to the OUT pin). This signal is used to drive the active filter/amplifier. Filter resistor values must be chosen to limit the maximum current load on this pin to less than 2mA. The output is current limit protected to a typical value of 4.5mA. IN A (Pin 14): PWM Positive Input. Input is isolated from digital source by ~100pF series capacitor. A 10k resistor should be connected to the IN A pin in series with the isolation capacitor for transient protection. The PWM receiver implements a diode forward drop of input hysteresis (relative to IN B). This hysteresis and internal signal limiting assure common mode glitch rejection with isolation capacitor mismatches up to 2:1. For maximum performance, however, effort should be made to match the two PWM input isolation capacitors. Pin IN A is differentially clamped to pin IN B through back-to back isolation-base diodes. This results in a high impedance differential input 100mV beyond the input thresholds. 5k internal input resistors yield a 10k (nominal) differential overdrive impedance.
FUNCTIONAL BLOCK DIAGRA
100pF + PWM INPUT - 100pF 10k
10k
IN A
5k V+
IN B
5k -1.25V V+
BGOUT
COMP1 100pF FILTER ELEMENTS COMP2
20pF
RING OUTPUT (RING RETURN) V-
1684 BD
LT1684 Block Diagram
6
+
AMPIN
5k
W
-
U
U
U
U
U
+1.25V
GATE + 14V 15k ATREF LIM +
CURRENT LIMIT 14V
OUT
GATE - LIM - V-
LT1684
OPERATION
BASIC THEORY OF OPERATION The LT1684 operates using a user-provided pulse-widthmodulated (PWM) digital signal as input*. The low frequency modulation component of this signal represents the desired output waveform. Changing the PWM input can thus dynamically control the frequency, cadence, amplitude and DC offset of the desired output. This method of sine wave generation can accomodate all popular ring tone frequencies including 17Hz, 20Hz, 25Hz and 50Hz. The LT1684 receives the PWM input by a capacitorisolated differential input at pins IN A and IN B. This signal is amplitude normalized by a bandgap reference and output single-ended on the BGOUT pin such that the PWM carrier is 1.25V about the voltage on the OUT pin. The low frequency component of the normalized PWM signal is recovered using an active filter circuit constructed using an onboard driver amplifier. This amplifier also provides current drive for the final ring tone output. The ring tone output is used as the reference for a floating active biasing scheme by pin ATREF. As the ring tone output rises and falls through its typical range of hundreds of volts, the LT1684 "tracks" the output signal, maintaining local supply voltages across the IC of approximately 10V. Input Receiver/Reference Buffer The differential receiver for the PWM input signal requires minimum differential input levels of 1.6V to assure valid change-of-state. The receiver inputs are capacitor coupled, isolating the LT1684 from the PWM generator. The receiver is leading edge triggered. The input receiver controls a switched-state output that forces an amplitude normalized voltage (referenced to the OUT pin) of 1.25V that follows the PWM input. This switched voltage is driven off-chip on pin BGOUT. When the IN A input is driven higher than IN B (by the required 1.6V), the reference drives BGOUT to +1.25V above OUT. When IN B input is driven higher than IN A, BGOUT is forced to -1.25V relative to OUT.
* Contact Linear Technology for code.
U
(Refer to Functional Block Diagram)
The amplitude normalized representation of the input PWM signal is used as the input for the active filter element and output driver. Output Amplifier/Driver The normalized PWM signal output on the BGOUT pin is converted to the final ring tone signal by an active filter. This filter consists of an onboard amplifier and a few external components. Although many different types of filters can be constructed, a 2-pole Multiple Feedback (MFB) configuration generally provides adequate performance and is desirable due to its simplicity and effectiveness. The low frequency component of the 1.25V PWM signal contains the desired ring tone frequency and cadence information. The MFB active filter strips this information from the PWM signal and amplifies this low frequency component to generate the final desired output. Active Tracking Supplies Implementation of the active tracking supply technique enables linear generation of the ring tone output, and takes advantage of the intrinsic supply noise immunity in a linear amplifier, reducing the need for large high voltage filtering elements. Two external power MOSFETs act as voltage level-shifting devices and generate the power supply voltages for the LT1684. The LT1684 uses its own output as a voltage reference for the FET level shifters, "suspending" itself (by these generated supply voltages) about the signal output. In this manner, the LT1684 can linearly generate a signal hundreds of volts in amplitude at its output, while maintaining 10V local supply rails across the IC itself.
7
LT1684
APPLICATIONS INFORMATION
Encoded PWM Signal Input Basics The LT1684 requires a user-supplied PWM carrier that represents the desired output ring tone signal. This PWM input is normalized by the LT1684 such that ring tone output amplitudes can be accurately encoded into the PWM input. The LT1684 accepts a differential input to maximize rejection of system transients and ground noise. If no differential signal is readily available from the PWM controller, a simple inverter/buffer block can be used to create the differential signal required. Each differential input is internally connected through a 5k series resistor to back-to-back isolation-base diodes. These devices internally clamp the differential input signal to 100mV greater than the input comparator hysteresis range. The input comparator toggles with a differential hysteresis equal to that of a standard diode forward voltage (0.7V nominal). As such, the differential impedance of the input remains high throughout the input hysteresis region, then reduces to a nominal value of 10k (7k minimum) as the input is overdriven beyond the comparator input threshold. A minimum differential input of 1.6V is specified to assure valid switching. The PWM signal can be visualized in terms of instantaneous ring tone amplitude, normalized to the LT1684 amplitude reference. For a given desired output voltage VOUTN, the input pulse train required follows the relation: VOUTN = 2 * VREF * (DC - 0.5), or DC = [VOUTN / (2 * VREF)] + 0.5, where: VREF = 1.25V normalized peak voltage DC = PWM input duty cycle A 10% to 90% duty cycle range is a practical limit for a 10kHz input carrier. This corresponds to normalized signal amplitude of 1V. Duty cycles exceeding this range can cause increased output signal distortion as signal energy is lost due to finite rise and fall times becoming a significant percentage of the signal pulses. The associated reduction in the pulse energy manifests itself as a "soft clipping" of the output signal resulting in increases in harmonic distortion and DC offset voltage. The normalized PWM signal is amplified to the desired output signal level by the active filter/amplifier stage. Thus, dividing the desired peak output amplitude by the peak normalized encoded amplitude (VOUT/VOUTN) yields the required DC gain of the active filter. System Considerations Assuming use of a 10% to 90% maximum PWM range, the peak normalized signal will be: VPWM(pk) = 0.8 * VREF = 1.0V, and: VOUT(pk) = VPWM(pk) * Filter DC Gain Thus, the DC gain of the output filter equals the desired peak voltage of the output ring tone signal. The frequency characteristics of the lowpass output filter must reflect the allowable carrier ripple on the output signal. For example, a 10kHz carrier system could use a 2-pole Butterworth lowpass with a cutoff frequency of 100Hz. This filter provides 40dB of input signal rejection at 10kHz yielding 25mVP-P output ripple. If the DC gain of the output filter/amplifier was 100, the output ripple voltage would be riding on a 100V sine wave, and therefore be about - 78dB relative to the output ring signal.
8
U
W
U
U
LT1684
APPLICATIONS INFORMATION
+
VIN
Filter Design and Component Selection The ring tone information represented in the low frequency component of the input PWM signal is retrieved using an active filter. This filter also generates the appropriate low frequency gain required to produce the high voltage output signal and references the output to ground (or other system reference). The frequency and gain characteristics of this circuit element are both configurable by the appropriate choice of external passive filter elements. Because of the active tracking supply mode of operation, conventional active filter topologies cannot be used. Most amplifier/filter topologies can, however, be "transformed" into active tracking supply topologies. A conventional amplifier circuit topology can be "transformed" into a active tracking supply amplifier circuit by: a) Inverting the amplifier signal polarity (swap amplifier + and - connections).
R2
Figure 1a. Conventional Filter Configuration
VIN
-
R2
1684 F01b
Figure 1b. Active Tracking Supply Amplifier Transformation
+ - +
VIN C1 LOAD
A variety of amplifier/filter configurations can be realized using the transformation technique. A 2-pole filter is generally adequate for most ringer applications. Due to the relative simplicity of infinite-gain Multiple Feedback (MFB) configurations, this family of filters are good candidates for ringer applications. Component selection and active tracking supply transformation will be described for the following 2-pole MFB infinite-gain lowpass filter.
Figure 2a. Lowpass Infinite-Gain Multiple Feedback Filter
VIN
C1 R1 R2 R3 C2
-
Figure 2b. Active Tracking Supply Transformed Multiple Feedback Filter
+
-
+
-
b) Referencing all signals to the output except the feedback elements, which are referenced to ground (swap output and ground).
R1
C2 R3
+
R1
-
+
+
-
-
For applications that are extremely output ripple sensitive, additional carrier rejection can be accomplished by modifying the output filter/amplifier characteristics such as implementing elliptical filter characteristics with a lower cutoff frequency or implementation of additional poles.
U
W
U
U
R1
R2
LOAD
1684 F01a
LOAD
1684 F02a
LOAD
1684 F02b
9
LT1684
APPLICATIONS INFORMATION
The component selections for the filter configuration shown in Figure 2 follows the relations: R2 = 1 [1-4mQ2(1+|HO|)]1/2 2nC1mQ R1 = R2 / |HO| R3 = Example: Conditions: Output ring tone peak voltage = 100V Ring Frequency = 20Hz Input duty cycle range = 10% to 90% Filter Q = 0.707 Set: Choose: Then: fn = n / 2 = 100Hz C1 = 1.0F (a convenient value) m [4(0.7)2(1+100)]-1 .005 C2 = mC1 (sets m = 0.0047) R2 = 1 [1- 4(0.0047)(0.707)2(101)]1/2 (4100)(1e-6)(.0047)(0.707) R2 = 300k R1 = 300k/100 R1 = 3.0k R3 = [(2100)2(1e-6)2(300k)(0.0047)]-1 R3 = 2k This filter configuration yields a DC Gain of 100, a corner frequency of just under 100Hz with gain reduction of only 0.1% at 20Hz, and a 10kHz carrier rejection of greater than 40dB at the output. C2 = 4700pF 1 n2C12R2m
-50 1 10 100 1K HERTZ (Hz) 10K 100K
1684 F03
FILTER GAIN (dB)
C2 = mC1
m 1 / [4Q2(1+|HO|)]
10
U
W
U
U
50
0
Figure 3. Active Tracking Supply Multiple Feedback Filter Transfer Characteristic (AV vs fn)
Active Tracking Supply Components Given the previous discussion, implementation of an Active Tracking Supply system may seem almost trivial. However, bootstrapping an amplifier system about its own output creates a complex myriad of inherent stability and response issues. Attempting such a configuration with generic "jelly-bean" components is not recommended for the faint of heart or type-A personalities. The LT1684, however, makes for a simplistic approach to Active Tracking component selection. The high voltage MOSFET transistors used in the circuit must have an operating VDS specified at greater than the corresponding high voltage supply rail plus the opposite maximum excursion of the output signal. For example, if a system is designed with a 240V supply (+ 120V, -120V) and outputs a ring signal that has a 100V peak amplitude, the MOSFET VDS ratings must be greater than 240/2 + 100 = 220V.
LT1684
PACKAGE DESCRIPTION U
Dimensions in inches (millimeters) unless otherwise noted. N Package 14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.770* (19.558) MAX 14 13 12 11 10 9 8
0.255 0.015* (6.477 0.381)
1 0.300 - 0.325 (7.620 - 8.255) 0.130 0.005 (3.302 0.127) 0.020 (0.508) MIN 0.009 - 0.015 (0.229 - 0.381)
2
3
4
5
6
7
0.045 - 0.065 (1.143 - 1.651)
0.065 (1.651) TYP 0.125 (3.175) MIN 0.018 0.003 (0.457 0.076)
N14 1197
0.005 (0.125) MIN 0.100 0.010 (2.540 0.254) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
(
+0.035 0.325 -0.015 +0.889 8.255 -0.381
)
S Package 14-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.337 - 0.344* (8.560 - 8.738) 14 13 12 11 10 9 8
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0 - 8 TYP
2
3
4
5
6
7
0.053 - 0.069 (1.346 - 1.752)
0.004 - 0.010 (0.101 - 0.254)
0.016 - 0.050 0.406 - 1.270
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
S14 0695
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
11
LT1684
TYPICAL APPLICATIO
VIN 5V + PWM INPUT - C1 100pF R4 10k IN B LT1684 C3, 100pF COMP1 BGOUT R3 5k COMP2 AMPIN IN A
C2 100pF R2 10k R10 100k
C4, 20pF
LIM -
GATE +
FB1 FMB1601 D1 D1N4001 C8 1F R1 2k R5 300k C5 4700pF
V-
V+
GATE -
LIM +
ATREF
OUT R6 3k C6 6.8nF 160V DZ1 60V MMSZ5264BT1
RELATED PARTS
PART NUMBER LT1676 LT1339 LTC1177-5/LTC1177-12 DESCRIPTION Wide Input Range, High Efficiency, Step-Down Switching Regulator High Power Synchronous DC/DC Controller Isolated MOSFET Drivers COMMENTS Operation Up to 60V, 100kHz, Up to 500mA Output Operation Up to 60V, Output Current Up to 50A 2500VRMS Isolation, UL Recognized
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
U
5V Input Nonisolated 5 REN Ring Generator
+100V D2 MURS160T3
+
C11 0.47F 200V C10 0.47F 200V
1 2 11 12
T1 COILTRONICS CTX 14239-X3 7, 8 5, 6 C12 + 220F 35V
+
R8 100 M1 IRF610
D3 MURS160T3 4 SW
U1 VIN 5 R12 5k
C7 6.8nF 160V
DS1 MBRS1100
1
LT1271 VC GND 3 FB
2
R11 470 C9 0.1F
R7 100 M2 IRF9610
R9 100k R16 1M
R15 12k
D4 D1N4148
U1 1 2 3 4 OUT A -IN A +IN A VEE VCC OUT B -IN B +IN B LT1211 8 7 6 5 R13 12k D5 D1N4148 R14 1M
-100V
DS2 D1N5817
C13 0.1F RING TONE OUT
1684 TA02
1684i LT/TP 0299 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1999


▲Up To Search▲   

 
Price & Availability of LT1684

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X