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PD - 94365B HEXFET(R) l IRF6604 Power MOSFET Application Specific MOSFETs l Ideal for CPU Core DC-DC Converters l Low Conduction Losses l Low Switching Losses l Low Profile (<0.7 mm) l Dual Sided Cooling Compatible l Compatible with existing Surface Mount Techniques VDSS 30V RDS(on) max 11.5m@VGS = 7.0V 13m@VGS = 4.5V Qg 17nC Description DirectFET ISOMETRIC The IRF6604 combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance charge product in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, IMPROVING previous best thermal resistance by 80%. The IRF6604 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6604 has been optimized for parameters that are critical in synchronous buck converters including Rds(on) and gate charge to minimize losses in the control FET socket. Absolute Maximum Ratings Parameter VDS VGS ID @ TC = 25C ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C PD @TA = 70C PD @TC = 25C TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 7.0V Continuous Drain Current, VGS @ 7.0V Continuous Drain Current, VGS @ 7.0V Pulsed Drain Current Max. 30 12 49 12 9.2 92 2.3 1.5 42 0.018 -40 to + 150 Units V A g Power Dissipation g Power Dissipation Power Dissipation c W W/C C Linear Derating Factor Operating Junction and Storage Temperature Range Thermal Resistance Parameter RJA RJA RJA RJC RJ-PCB Junction-to-Ambient Junction-to-Ambient Junction-to-Ambient Junction-to-Case i f g h Typ. --- 12.5 20 --- 1.0 Max. 55 --- --- 3.0 --- Units C/W Junction-to-PCB Mounted Notes through are on page 11 www.irf.com 1 6/11/03 IRF6604 Static @ TJ = 25C (unless otherwise specified) Parameter BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. Typ. Max. Units 30 --- --- --- 1.0 --- --- --- --- --- 38 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 27 9.0 10 --- -4.5 --- --- --- --- --- 17 4.1 1.0 6.3 5.6 7.3 9.5 11 4.3 18 25 2270 420 190 --- --- 13 3.0 --- 30 100 100 -100 --- 26 --- --- --- --- --- --- --- --- --- --- --- --- --- pF VGS = 0V VDS = 15V ns nC nC VDS = 15V VGS = 4.5V ID = 9.6A S nA V mV/C A V Conditions VGS = 0V, ID = 250A mV/C Reference to 25C, ID = 1mA m VGS = 7.0V, ID = 12A 11.5 VGS = 4.5V, ID = 9.6A e e VDS = VGS, ID = 250A VDS = 24V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 125C VGS = 12V VGS = -12V VDS = 15V, ID = 9.6A See Fig. 16 VDS = 16V, VGS = 0V VDD = 15V, VGS = 4.5VAe ID = 9.6A Clamped Inductive Load = 1.0MHz Avalanche Characteristics EAS IAR EAR Parameter Single Pulse Avalanche Energyd Avalanche CurrentA Repetitive Avalanche Energy Typ. --- --- --- Max. 32 9.6 0.23 Units mJ A mJ --- --- --- --- --- --- --- 0.94 31 26 Diode Characteristics Parameter IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time Min. Typ. Max. Units 12 A 92 1.2 47 39 V ns nC Conditions MOSFET symbol showing the integral reverse G S D p-n junction diode. TJ = 25C, IS = 9.6A, VGS = 0V TJ = 25C, IF = 9.6A di/dt = 100A/s e e Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) 2 www.irf.com IRF6604 1000 VGS 10V 7.0V 4.5V 4.0V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP 1000 ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 100 VGS 10V 7.0V 4.5V 4.0V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP 2.7V 10 2.7V 10 20s PULSE WIDTH Tj = 25C 1 0.1 1 10 100 1 0.1 1 20s PULSE WIDTH Tj = 150C 10 100 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100.00 2.0 I D = 12A T J = 150C ID, Drain-to-Source Current () 1.5 TJ = 25C R DS(on) , Drain-to-Source On Resistance 10.00 (Normalized) 1.0 0.5 VDS = 15V 20s PULSE WIDTH 1.00 2.5 3.0 3.5 4.0 V GS = 7.0V 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRF6604 10000 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds 6.0 ID= 9.6A VGS , Gate-to-Source Voltage (V) 5.0 VDS= 24V VDS= 15V C, Capacitance(pF) Ciss 4.0 1000 3.0 Coss 2.0 Crss 1.0 100 1 10 100 0.0 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 100 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) I SD , Reverse Drain Current (A) TJ = 150 C 10 ID, Drain-to-Source Current (A) 100 10 100sec 1msec 1 Tc = 25C Tj = 150C Single Pulse 0 1 10 100 1000 10msec T J= 25 C 1 V GS = 0 V 0.1 0.0 0.5 1.0 1.5 2.0 0.1 V SD ,Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRF6604 12 2.0 VGS(th) Gate threshold Voltage (V) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 9 ID , Drain Current (A) ID = 250A 6 3 0 25 50 75 100 125 150 -75 -50 -25 0 25 50 75 100 125 150 TA, Ambient Temperature (C) T J , Temperature ( C ) Fig 9. Maximum Drain Current Vs. Ambient Temperature Fig 10. Threshold Voltage Vs. Temperature 100 (Z thJA ) D = 0.50 0.20 10 0.10 Thermal Response 0.05 P DM t1 t2 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = 2. Peak T 0.1 0.00001 0.0001 0.001 0.01 0.1 t1/ t 2 +T A 10 100 0.02 1 0.01 J = P DM x Z thJA 1 t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient www.irf.com 5 IRF6604 80 15V TOP L RG VGS 20V D.U.T IAS tp + V - DD A EAS , Single Pulse Avalanche Energy (mJ) VDS DRIVER 60 BOTTOM ID 4.3A 7.7A 9.6A 40 0.01 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 20 0 25 50 75 100 125 150 Starting Tj, Junction Temperature ( C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS LD VDS Fig 12b. Unclamped Inductive Waveforms + VDD D.U.T Current Regulator Same Type as D.U.T. VGS Pulse Width < 1s Duty Factor < 0.1% 50K 12V .2F .3F Fig 14a. Switching Time Test Circuit D.U.T. + V - DS VDS 90% VGS 3mA 10% IG ID VGS td(on) tr td(off) tf Current Sampling Resistors Fig 13. Gate Charge Test Circuit Fig 14b. Switching Time Waveforms 6 www.irf.com IRF6604 D.U.T Driver Gate Drive + P.W. Period D= P.W. Period VGS=10V + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt - - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD VDD + - Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs Id Vds Vgs Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 16. Gate Charge Waveform www.irf.com 7 IRF6604 Power MOSFET Selection for Non-Isolated DC/DC Converters Control FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. Power losses in the control switch Q1 are given by; Synchronous FET The power loss equation for Q2 is approximated by; * Ploss = Pconduction + P + Poutput drive Ploss = Irms x Rds(on) + ( g x Vg x f ) Q ( 2 ) Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput This can be expanded and approximated by; Q + oss x Vin x f + (Qrr x Vin x f ) 2 *dissipated primarily in Q1. For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs' susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on. Ploss = (Irms 2 x Rds(on ) ) Qgs 2 Qgd +I x x Vin x f + I x x Vin x f ig ig + (Qg x Vg x f ) + Qoss x Vin x f 2 This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 16. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Qgs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitances Cds and Cdg when multiplied by the power supply input buss voltage. Figure A: Qoss Characteristic 8 www.irf.com IRF6604 DirectFET Outline Dimension, MQ Outline (Medium Size Can, Q-Designation). www.irf.com 9 IRF6604 DirectFET Board Footprint, MQ Outline (Medium Size Can, Q-Designation). DirectFET Tape & Reel Dimension (Showing component orientation). 10 www.irf.com IRF6604 DirectFET Part Marking 6604 Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 0.70mH R G = 25, IAS = 9.6A. Pulse width 400s; duty cycle 2%. Surface mounted on 1 in. square Cu board. Used double sided cooling , mounting pad. Mounted on minimum footprint full size board with metalized back and with small clip heatsink. TC measured with thermal couple mounted to top (Drain) of part. Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.6/03 www.irf.com 11 |
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