| PART |
Description |
Maker |
| XCR5128C-10TQ128C XCR5128C-15TQ128C XCR5128C-10TQ1 |
128 Macrocell CPLD with Enhanced Clocking EE PLD, 10 ns, PQFP128
128 Macrocell CPLD with Enhanced Clocking 128个宏单元CPLD增强型时
|
Xilinx, Inc.
XILINX INC
|
| XCR5128C DS042 |
with Enhanced Clocking
From old datasheet system
|
Xilinx
|
| AN663 |
PRECISION32 MCU FAMILY CLOCKING OPTIONS
|
Silicon Laboratories
|
| XCR3128A-10TQ128C XCR3128A-10TQ128I XCR3128A-10VQ1 |
CPLD with Enhanced Clocking EE PLD, 10 ns, PQFP100
|
Xilinx, Inc.
XILINX[Xilinx, Inc]
|
| XCR5064C-1 XCR5064C-10PC44I XCR5064C-10VQ44I XCR50 |
64 Macrocell CPLD with Enhanced Clocking EE PLD, 12 ns, PQCC44
|
Xilinx, Inc.
XILINX[Xilinx, Inc]
|
| AN-823 |
Direct Digital Synthesizers in Clocking Applications Time
|
Analog Devices
|
| CS2100P-CZZR |
Clocking-Timing IC General Purpose PLL Crystal PHASE LOCKED LOOP, 30 MHz, PDSO10
|
Cirrus Logic, Inc.
|
| CS2300P-CZZ |
Clocking-Timing IC Gen Purpose PLL Clock Multi w/LCO PHASE LOCKED LOOP, 30 MHz, PDSO10
|
Cirrus Logic, Inc.
|
| AS80M2516A AS80M2516A_V1.0 |
3.3 V, generater an EMI optimizer clocking signal at output
dual phase lock loop clock chip
From old datasheet system
|
ALSC[Alliance Semiconductor Corporation]
|
| CS2000 |
New Clocking Family Offers System Flexibility, Lower Cost, and Easier System Design
|
Cirrus Logic
|
