| PART |
Description |
Maker |
| AS7C33512PFS18A-133TQCN AS7C33512PFS18A-133TQI AS7 |
3.3V 512K x 18 pipeline burst synchronous SRAM
|
Alliance Semiconductor Corporation
|
| AS5SP512K18DQ AS5SP512K18DQ-30ET AS5SP512K18DQ-30I |
512K X 18 CACHE SRAM, 4 ns, PQFP100
Plastic Encapsulated Microcircuit 9Mb, 512K x 18, Synchronous SRAM Pipeline Burst, Single Cycle Deselect
|
MICROSS COMPONENTS
Austin Semiconductor
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| WED2ZL361MV50BC WED2ZL361MV38BC WED2ZL361MV42BC WE |
1M x 36 Synchronous Pipeline Burst NBL SRAM(1M x 36,5.0ns同步脉冲流水线静态RAM(无总线等待时间 100万36同步管道爆裂NBL的静态存储器00万x 36,5.0纳秒同步脉冲流水线静态随机存储器（无总线等待时间））
1M x 36 Synchronous Pipeline Burst NBL SRAM(1M x 36,3.8ns同步脉冲流水线静态RAM(无总线等待时间 100万36同步管道爆裂NBL的静态存储器00万x 36,3.8纳秒同步脉冲流水线静态随机存储器（无总线等待时间））
1M x 36 Synchronous Pipeline Burst NBL SRAM(1M x 36,4.2ns同步脉冲流水线静态RAM(无总线等待时间 100万36同步管道爆裂NBL的静态存储器00万x 36,4.2纳秒同步脉冲流水线静态随机存储器（无总线等待时间））
1M x 36 Synchronous Pipeline Burst NBL SRAM(1M x 36,3.5ns同步脉冲流水线静态RAM(无总线等待时间 100万36同步管道爆裂NBL的静态存储器00万x 36,3.5纳秒同步脉冲流水线静态随机存储器（无总线等待时间））
|
Vicor, Corp.
|
| AS7C25512FT32_36A AS7C25512FT32A-10TQC AS7C25512FT |
2.5V 512K x 32/36 flowthrough burst synchronous SRAM 512K X 36 STANDARD SRAM, 8.5 ns, PQFP100
2.5V 512K x 32/36 flowthrough burst synchronous SRAM 512K X 32 STANDARD SRAM, 10 ns, PQFP100
2.5V 512K x 32/36 flowthrough burst synchronous SRAM 512K X 32 STANDARD SRAM, 8.5 ns, PQFP100
DIODE ZENER SINGLE 1000mW 47Vz 5.5mA-Izt 0.05 5uA-Ir 35.8Vr DO41-GLASS 5K/REEL
Sync SRAM - 2.5V
2.5V 512K x 32/36 flowthrough burst synchronous SRAM
|
Alliance Semiconductor, Corp.
Alliance Semiconductor Corporation
ALSC
Alliance Semiconductor ...
|
| AS7C33256PFS18B AS7C33256PFS18BV.1.7 AS7C33256PFS1 |
3.3V 256K X 18 pipeline burst synchronous SRAM 3.3 256 × 18管道爆裂同步SRAM
3.3V 256K X 18 pipeline burst synchronous SRAM 256K X 18 STANDARD SRAM, 8 ns, PQFP100
Sync SRAM - 3.3V
From old datasheet system
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| GS8161E36BD-150 GS8161E36BT-150 GS8161E36BGT-200I |
1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs 512K X 36 CACHE SRAM, 7.5 ns, PBGA165
1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs 512K X 36 CACHE SRAM, 7.5 ns, PQFP100
1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs 512K X 36 CACHE SRAM, 6.5 ns, PQFP100
1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs 512K X 36 CACHE SRAM, 6.5 ns, PBGA165
1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs 100万18，为512k × 36，为512k × 36 35.7同步突发静态存储器
1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs 1M X 18 CACHE SRAM, 7.5 ns, PBGA165
1M x 18, 512K x 36, 512K x 36 18Mb Sync Burst SRAMs 512K X 36 CACHE SRAM, 5.5 ns, PQFP100
|
GSI Technology, Inc.
|
| WED2DL32512V38BC WED2DL32512V40BI WED2DL32512V40BC |
512Kx32 Synchronous Pipeline Burst SRAM
|
WEDC[White Electronic Designs Corporation]
|
| GS88019AT-133 GS88019AT-133I GS88019AT-150I GS8801 |
512K X 18 CACHE SRAM, 3.5 ns, PQFP100
250MHz 512K x 18 9Mb sync burst SRAM
225MHz 512K x 18 9Mb sync burst SRAM
200MHz 512K x 18 9Mb sync burst SRAM
166MHz 512K x 18 9Mb sync burst SRAM
150MHz 512K x 18 9Mb sync burst SRAM
133MHz 512K x 18 9Mb sync burst SRAM
150MHz 256K x 32 9Mb sync burst SRAM
166MHz 256K x 32 9Mb sync burst SRAM
225MHz 256K x 32 9Mb sync burst SRAM
250MHz 256K x 32 9Mb sync burst SRAM
133MHz 256K x 36 9Mb sync burst SRAM
150MHz 256K x 36 9Mb sync burst SRAM
166MHz 256K x 36 9Mb sync burst SRAM
200MHz 256K x 36 9Mb sync burst SRAM
225MHz 256K x 36 9Mb sync burst SRAM
133MHz 256K x 32 9Mb sync burst SRAM
200MHz 256K x 32 9Mb sync burst SRAM
250MHz 256K x 36 9Mb sync burst SRAM
|
GSI Technology
|
| TC55V16366FF-133 |
512K Word x 36 Bit Synchronous Pipelined Burst Static RAM(512K 字x 36位同步管道脉冲静RAM)
|
Toshiba Corporation
|
|
