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ALTERA
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Part No. |
EP20K100EQ EP20K100QC EP20K100EQC240-2
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OCR Text |
... differential signaling (LVDS), LVPECL, PCI-X, AGP, CTT, stubseries terminated logic (SSTL-3 and SSTL-2), Gunning transceiver logic plus (GT...to drive 29 other LEs through the fast local interconnect Advanced packaging options - Available in ... |
Description |
Apex 20KE Device Family (1.8V, LVDS Apex 20K Device Family (2.5V)
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File Size |
585.74K /
116 Page |
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ICS
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Part No. |
ICS843404
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OCR Text |
LVPECL AND LVDS CLOCK GENERATOR
FEATURES
* Three banks of outputs: 1 bank of 2 LVDS outputs and 2 banks of 1 LVPECL output * Selectable cr...to generate 3.3V or 2.5V LVPECL levels * RMS phase jitter at 106.25MHz, using a 25.5MHz crystal (637... |
Description |
Low phase noise, Fibre Channel LVPECL/LVDS Clock Generator
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File Size |
235.12K /
16 Page |
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ICS
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Part No. |
ICS9DB206
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OCR Text |
...orts the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL * Maximum output frequency: 140MHz * Output skew: 110ps (maximum) * Cycle-to-Cycle jitter: 110ps (maximum) * RMS phase jitter @ 100MHz, (1.5MHz - 22MHz): 2.42ps (typical) * 3.... |
Description |
High Performance 1-to-6 HCSL Jitter Attenuator for PCI Express?
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File Size |
237.04K /
13 Page |
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Maxim Integrated Products, Inc. MAXIM - Dallas Semiconductor
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Part No. |
MAX3952 MAX3952EGK
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OCR Text |
... IIH IIL VOH VOL V V A A V V
LVPECL INPUT SPECIFICATIONS (REFCLK) LVPECL Input High Voltage LVPECL Input Low Voltage LVPECL Input Bias Vo...to 100 differential load, PRBSEN = GND, and SCLKEN = GND.
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Description |
Telecomm/Datacomm 10Gbps 16:1 Serializer
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File Size |
296.92K /
10 Page |
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it Online |
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Price and Availability
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