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  lvpecl-to-lvttl Datasheet PDF File

For lvpecl-to-lvttl Found Datasheets File :: 2499    Search Time::4.984ms    
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    MPC951

Motorola, Inc
Part No. MPC951
OCR Text ...pplications the MPC951 offers a LVPECL clock input as a PLL reference. This allows the user to use LVPECL as the primary clock distribution device to take advantage of its far superior skew performance. The MPC951 then can lock onto the LVP...
Description LOW VOLTAGE PLL CLOCK DRIVER

File Size 109.33K  /  13 Page

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    MPC953

MOTOROLA[Motorola, Inc]
Part No. MPC953
OCR Text ... The MPC953 has a differential LVPECL reference input along with an external feedback input. These features make the MPC953 ideal for use a...to drive terminated 50 transmission lines. For series terminated 50 lines, each of the MPC953 output...
Description LOW VOLTAGE PLL CLOCK DRIVER

File Size 106.73K  /  7 Page

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    ALTERA
Part No. EP20K100EQ EP20K100QC EP20K100EQC240-2
OCR Text ... differential signaling (LVDS), LVPECL, PCI-X, AGP, CTT, stubseries terminated logic (SSTL-3 and SSTL-2), Gunning transceiver logic plus (GT...to drive 29 other LEs through the fast local interconnect Advanced packaging options - Available in ...
Description Apex 20KE Device Family (1.8V, LVDS
Apex 20K Device Family (2.5V)

File Size 585.74K  /  116 Page

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    ISPPAC-CLK5510V ISPPAC-CLK5510V-01T48I ISPPAC-CLK5510V-01T48C ISPPAC-CLK5520V-01T100C ISPPAC-CLK5520V-01T100I ISPPAC-CLK

LATTICE[Lattice Semiconductor]
Part No. ISPPAC-CLK5510V ISPPAC-CLK5510V-01T48I ISPPAC-CLK5510V-01T48C ISPPAC-CLK5520V-01T100C ISPPAC-CLK5520V-01T100I ISPPAC-CLK5520V-01TN100C ISPPAC-CLK5520V-01TN100I ISPPAC-CLK55XX ISPPAC-CLK5510V-01TN48C ISPPAC-CLK5510V-01TN48I
OCR Text ...VTTL, LVCMOS, HSTL, SSTL, LVDS, LVPECL * Programmable precision output impedance - 40 to 70 in 5 increments * Programmable slew rate * Up to 10 banks with individual VCCO and GND - 1.5V, 1.8V, 2.5V, 3.3V * Programmable lock detect * Multipl...
Description In-System Programmable Clock Generator with Universal Fan-Out Buffer

File Size 794.03K  /  43 Page

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    XCV405E-8BG560C XCV405E-8BG560I XCV405E-8FG560C XCV405E-8FG560I XCV405E-6BG560C XCV405E-6BG560I XCV405E-6FG560C XCV405E-

XILINX[Xilinx, Inc]
Xilinx, Inc.
Part No. XCV405E-8BG560C XCV405E-8BG560I XCV405E-8FG560C XCV405E-8FG560I XCV405E-6BG560C XCV405E-6BG560I XCV405E-6FG560C XCV405E-6FG560I XCV405E XCV812E XCV405E-7BG560C XCV405E-7BG560I XCV405E-7FG560C XCV405E-7FG560I BG560
OCR Text ...S (622 Mb/s), BLVDS (Bus LVDS), LVPECL - Al I/O signals can be input, output, or bi-directional * ZBT is a trademark of Integrated Device T...to-chip communication link - Support for Double Data Rate (DDR) interface - Web-based HDL generation...
Description    Fast, Extended Block RAM, 1.8 V FPGA Family
Extended Memory Field Programmable Gate Arrays

File Size 36.65K  /  4 Page

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    ICS
Part No. ICS843404
OCR Text LVPECL AND LVDS CLOCK GENERATOR FEATURES * Three banks of outputs: 1 bank of 2 LVDS outputs and 2 banks of 1 LVPECL output * Selectable cr...to generate 3.3V or 2.5V LVPECL levels * RMS phase jitter at 106.25MHz, using a 25.5MHz crystal (637...
Description Low phase noise, Fibre Channel LVPECL/LVDS Clock Generator

File Size 235.12K  /  16 Page

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    ICS
Part No. ICS9DB206
OCR Text ...orts the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL * Maximum output frequency: 140MHz * Output skew: 110ps (maximum) * Cycle-to-Cycle jitter: 110ps (maximum) * RMS phase jitter @ 100MHz, (1.5MHz - 22MHz): 2.42ps (typical) * 3....
Description High Performance 1-to-6 HCSL Jitter Attenuator for PCI Express?

File Size 237.04K  /  13 Page

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    ICS844071I ICS844071AGI ICS844071AGIT

ICST[Integrated Circuit Systems]
Part No. ICS844071I ICS844071AGI ICS844071AGIT
OCR Text ...hat there is no trace attached. LVPECL OUTPUT All unused LVPECL outputs can be left floating. We recommend that there is no trace attached. ...to ground. CLK INPUT: For applications not requiring the use of the test clock, it can be left float...
Description FEMTOCLOCKS?/a> CRYSTAL-TO- LVDS CLOCK GENERATOR
FEMTOCLOCKS⑩ CRYSTAL-TO- LVDS CLOCK GENERATOR
FEMTOCLOCKS CRYSTAL-TO- LVDS CLOCK GENERATOR

File Size 157.04K  /  10 Page

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    Maxim Integrated Products, Inc.
MAXIM - Dallas Semiconductor
Part No. MAX3952 MAX3952EGK
OCR Text ... IIH IIL VOH VOL V V A A V V LVPECL INPUT SPECIFICATIONS (REFCLK) LVPECL Input High Voltage LVPECL Input Low Voltage LVPECL Input Bias Vo...to 100 differential load, PRBSEN = GND, and SCLKEN = GND. _______________________________________...
Description Telecomm/Datacomm
10Gbps 16:1 Serializer

File Size 296.92K  /  10 Page

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    HDMP-0482

Agilent (Hewlett-Packard)
HP[Agilent(Hewlett-Packard)]
Part No. HDMP-0482
OCR Text ...zers on all inputs * High speed LVPECL I/O * Buffered Line Logic (BLL) outputs (no external bias resistors required) * 1.09 W typical power ...to the system. A Port Bypass Circuit (PBC) consists of multiple 2:1 multiplexers daisy chained along...
Description HDMP-0482 · 1.0625-1.25 GBd Octal Port Bypass Circuit with CDR and Data Valid Detection for FC/Storage and GbE
Octal Cell Port Bypass Circuit with CDR and Data Valid Detection

File Size 134.84K  /  12 Page

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