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Integrated Device Techn...
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| Part No. |
8S89832AKILF 8S89832AKILFT 8S89832I
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| OCR Text |
...w and nqx outputs will go high on the next low transition at in inputs. input threshold is v dd /2v. includes a 37k ? pullup resistor. de...delay; (differential) note 1 300 550 ps t sk(o) output skew; note 2, 3 25 ps t sk(pp) part-to-part s... |
| Description |
Low Skew, 1-to-4 Differential-to-LVDS Fanout Buffer
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| File Size |
289.93K /
16 Page |
 View
it Online |
Download Datasheet
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Integrated Device Techn...
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| Part No. |
8S89832AKILFT 8S89832I 8S89832I-17
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| OCR Text |
...w and nqx outputs will go high on the next low transition at in inputs. input threshold is v dd /2v. includes a 37k ? pullup resistor. de...delay; (differential) note 1 300 550 ps t sk(o) output skew; note 2, 3 25 ps t sk(pp) part-to-part s... |
| Description |
Low Skew, 1-to-4 Different ial-to-LVDS Fanout Buffer
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| File Size |
311.98K /
14 Page |
View
it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
8S89831I-17
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| OCR Text |
...w and nqx outputs will go high on the next low transition at in input. input threshold is v cc /2. includes a 37k ? pull-up resistor. def...delay; (differential); note 1 input swing: 150mv 300 570 ps input swing: 800mv 255 510 ps t sk(o) ou... |
| Description |
Differential LVPECL-To-LVPECL/ECL Fanout Buffer
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| File Size |
354.82K /
19 Page |
View
it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
8S89831AKILF 8S89831AKILFT 8S89831I
|
| OCR Text |
...w and nqx outputs will go high on the next low transition at in input. input threshold is v cc /2. includes a 37k ? pull-up resistor. def...delay; (differential); note 1 input swing: 150mv 300 570 ps input swing: 800mv 255 510 ps t sk(o) ou... |
| Description |
Differential LVPECL-To-LVPECL/ECL Fanout Buffer
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| File Size |
348.43K /
21 Page |
View
it Online |
Download Datasheet |
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Integrated Device Techn...
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| Part No. |
8S89296 8S89296NLGI 8S89296NLGI8
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| OCR Text |
... varies in discrete steps based on a control word. a 10-bit long control word sets the delay in 10ps increments. also, the input pins in and nin default to an equivalent low state when left floating. the control register can accept cmos ... |
| Description |
LVDS Programmable Delay Line
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| File Size |
344.80K /
16 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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