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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
IDT723634L12PF
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| OCR Text |
...s functions) or first word fall through timing (using ora, orb, ira, and irb flag functions) ? ? ? ? ? programmable almost-empty and almost-full flags; each has three default offsets (8, 16 and 64) ? ? ? ? ? serial or parallel programming o... |
| Description |
512 X 36 BI-DIRECTIONAL FIFO, 8 ns, PQFP128
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| File Size |
405.88K /
35 Page |
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it Online |
Download Datasheet
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Winbond Electronics
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| Part No. |
W78L52/P/F
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| OCR Text |
...tion p0.0 ? p0.7 port 0, bits 0 through 7. port 0 is a bidirectional i/o port. this port also provides a multiplexed low order address/data bus during accesses to external memory. p1.0 ? p1.7 port 1, bits 0 through 7. port 1 is a bidirectio... |
| Description |
W78C52D Wide Voltage Version
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| File Size |
174.31K /
18 Page |
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it Online |
Download Datasheet |
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Winbond Electronics
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| Part No. |
W78C52D/DP/DF
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| OCR Text |
...tion p0.0 ? p0.7 port 0, bits 0 through 7. port 0 is a bidirectional i/o port. this port also provides a multiplexed low order address/data bus during accesses to external memory. p1.0 ? p1.7 port 1, bits 0 through 7. port 1 is a bidirectio... |
| Description |
8-bit MCU w/ 8Kx8 ROM, 256x8 RAM, 32 I/Os, 3 Timers, 1 Serial Port
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| File Size |
181.31K /
18 Page |
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it Online |
Download Datasheet |
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Cypress Semiconductor, Corp.
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| Part No. |
CYU01M16ZFCU-70BVXI CYU01M16ZFC
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| OCR Text |
...H). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a write operat... |
| Description |
1M X 16 PSEUDO STATIC RAM, 70 ns, PBGA48 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, FBGA-48
16-Mbit (1M x 16) Pseudo Static RAM
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| File Size |
419.63K /
14 Page |
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it Online |
Download Datasheet |
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Cypress Semiconductor, Corp.
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| Part No. |
CYU01M16SFCU-70BVXI CYU01M16SFCU
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| OCR Text |
...H). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a ... |
| Description |
1M X 16 PSEUDO STATIC RAM, 70 ns, PBGA48 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48
16-Mbit (1M x 16) Pseudo Static RAM
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| File Size |
384.68K /
12 Page |
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it Online |
Download Datasheet |
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Shenzhen Luguang Electronic Technology Co., Ltd
AVAGO TECHNOLOGIES LIMI...
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| Part No. |
PEX8605
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| OCR Text |
...ror correction as packets pass through the switch. power management and clock buffering the pex8605 supports the following power management states: l0, l0s, l1, l2/l3 ready, l2 and l3. moreover, the pex8605 supports vaux alo... |
| Description |
Low Packet Latency & High Performance
PCI Express Gen 2 Switch
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| File Size |
271.10K /
3 Page |
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it Online |
Download Datasheet |
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Shenzhen Luguang Electronic Technology Co., Ltd
AVAGO TECHNOLOGIES LIMI...
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| Part No. |
PEX8603
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| OCR Text |
...ror correction as packets pass through the switch. power management and reference clock buffers the pex8603 supports the following power management states: l0, l0s, l1, l2/l3 ready, l2 and l3. moreover, the pex8603 supports v... |
| Description |
Low Packet Latency & High Performance
PCI Express Gen 2 Switch
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| File Size |
248.58K /
3 Page |
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it Online |
Download Datasheet |
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Cypress Semiconductor, Corp.
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| Part No. |
CYU01M16SCCU-70BVXI CYU01M16SCCU
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| OCR Text |
...H). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE1 HIGH or CE2 LOW), outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH), or during a ... |
| Description |
1M X 16 PSEUDO STATIC RAM, 70 ns, PBGA48 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48
16-Mbit (1M x 16) Pseudo Static RAM
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| File Size |
384.39K /
12 Page |
View
it Online |
Download Datasheet |
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