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Linear Technology Corporation
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| Part No. |
LTC2284
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| OCR Text |
...up. Note 4: VDD = 3V, fSAMPLE = 105mhz, input range = 2VP-P with differential drive, unless otherwise noted. CL = 5pF (Note 7) CL = 5pF (Note 7) CL = 5pF (Note 7) (Note 7)
TI I G CHARACTERISTICS
UW
MIN 2.85 0.5
TYP 3 3 180 ... |
| Description |
Dual 14-Bit, 105Msps Low Power 3V ADC
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| File Size |
636.47K /
24 Page |
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Linear Technologu
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| Part No. |
LTC2254 LTC2255
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| OCR Text |
..., fSAMPLE = 125MHz (LTC2255) or 105mhz (LTC2254), input range = 2VP-P with differential drive, clock duty cycle stabilizer on, unless otherwise noted.
UW
MIN 1 3.8 3 3.8 3
LTC2255 TYP MAX 125 4 4 4 4 0 500 500 500 500
MIN 1 4.5 ... |
| Description |
14-Bit, 125/105Msps Low Power 3V ADCs
14-Bit, 125Msps Low Power 3V ADCs
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| File Size |
511.63K /
24 Page |
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it Online |
Download Datasheet |
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SAMSUNG SEMICONDUCTOR CO. LTD.
SAMSUNG[Samsung semiconductor]
Samsung Electronic
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| Part No. |
K4M563233D
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| OCR Text |
...(CL=3) K4M563233D-M(E)E/N/I/P80 105mhz(CL=2) K4M563233D-M(E)E/N/I/P1H 105mhz(CL=2) LVCMOS K4M563233D-M(E)E/N/I/P1L 105mhz(CL=3)*1
- M(E)E/N ; Normal/Low Power, Temp : -25C ~ 85C. - M(E)I/P ; Noraml/Low Power, Temp : -40C ~ 85C. Note : 1.... |
| Description |
8Mx32 Mobile SDRAM 90FBGA
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| File Size |
63.67K /
8 Page |
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it Online |
Download Datasheet |
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AMICC
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| Part No. |
A43E06321
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| OCR Text |
...refresh Clock Frequency (max) : 105mhz @ CL=3 (-95) 133MHz @ CL=3 (-75)
512K X 32 Bit X 2 Banks Low Power Synchronous DRAM
64ms refresh period (4K cycle) Self refresh with programmable refresh period through EMRS cycle Programmable Po... |
| Description |
512K X 32 Bit X 2 Banks Low Power Synchronous DRAM
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| File Size |
1,350.44K /
47 Page |
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it Online |
Download Datasheet |
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Price and Availability
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