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INTEGRATED DEVICE TECHNOLOGY INC Integrated Device Techn...
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Part No. |
74SSTVF16859PAG IDT74SSTVF16859PAG
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OCR Text |
...edge of clk center pad ground (mlf package only) symbol parameter test conditions min. typ. max. unit v ik control inputs v dd = 2.3v, i i = ? 18ma ? ? ?1.2 v v oh v dd = 2.3v to 2.7v, i oh = -100 av dd ? 0.2 ? ? v v dd = 2.3v, i oh... |
Description |
SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO64 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O
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File Size |
72.39K /
7 Page |
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