buffer
Features
* Pre-programmed Configurations * Fully field-programmable -- Input and output dividers -- Inverting/noninverting outputs ...divider -M. The divider can be any integer value See from 1 to 256; however, the PLL input frequency...
Description
23FP SERIES, PLL BASED CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 5.30 MM, SSOP-28 200-MHz Field Programmable Zero Delay buffer
...tegrated. There is also a TX LO buffer. The design is flexible, in that the bias currents may be set using off-chip current reference resist...divider enabled or disabled. NOTE 3. LO divider disabled. LO divider disabled logic conditions: A) B...