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GIB1401 SM2Z10 S15P05G LM564 R1EX24 INDUSTRY CH341DS1 74HC57
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    MT9122 MT9122AE MT9122AP

Mitel Semiconductor
MITEL[Mitel Networks Corporation]
Part No. MT9122 MT9122AE MT9122AP
OCR Text ...strobe, 8 or 16 data bits wide, enabling serial PCM data transfer for Echo Canceller A on Rin/Sout pins. Strobe period is 125 microseconds. For ST-BUS, this pin, in conjunction with the ENB1 pin, will select the proper ST-BUS mode for Rin/S...
Description CMOS Dual Voice Echo Canceller with Tone Detection

File Size 142.53K  /  32 Page

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    Intel
Part No. 82433NX 82433LX
OCR Text ...dress and data merging data and enabling output buffers Together these three components form a ``Host Bridge'' that provides a full function dual-port data path interface linking the host CPU and PCI bus to main memory This document describ...
Description LOCAL BUS ACCELERATOR (LBX)

File Size 530.69K  /  54 Page

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    M-Systems
Part No. MD2811
OCR Text enabling Features Highlights DiskOnChip Millennium Plus is an award-winning member of M-Systems' family of DiskOnChip flash disk products. To meet the needs of a growing application base, M-Systems offers it in two form factors, TSOP-I an...
Description Diskonchip Millennium Plus

File Size 775.13K  /  73 Page

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    AL460A-7-PBF AL4601.2 AL460A-13-PBF

AverLogic Technologies Inc
Part No. AL460A-7-PBF AL4601.2 AL460A-13-PBF
OCR Text ...enable signal that controls the enabling/ disabling of the 16-bit data input pins. the internal write address pointer is always incremented at the rising edge of wclk by enabling wen regardless of the ie level. wclk 38 i wclk is the...
Description Full HD FIFO Memory

File Size 400.75K  /  14 Page

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    9FGP202AKLF 9FGP202AKLFT

Integrated Device Technology
Part No. 9FGP202AKLF 9FGP202AKLFT
OCR Text ...5oe_96 in active high input for enabling 96hz outputs. 1 = enable out p ut ( s ) , 0 = tri-state out p ut ( s ) 6oe_cpu in active high input for enabling cpu diff pairs. 1 = enable out p ut ( s ) , 0 = tri-state out p ut ( s ) 7cpuclkt0...
Description FREQUENCY TIMING GENERATOR FOR PERIPHERALS

File Size 224.79K  /  19 Page

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    Averlogic Technologies
Part No. AL440C
OCR Text ... input signal that controls the enabling/ disabling of the 8bit data input pins. The internal write address pointer is always incremented at rising edge of WCK by enabling WE regardless of the IE level. WCK is the write clock input pin. The...
Description FIELD/FRAME/LINE MEMORY

File Size 258.19K  /  26 Page

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    HD26LS32 HD26LS32FP

Hitachi Semiconductor
Part No. HD26LS32 HD26LS32FP
OCR Text ...ge, both positive and negative, enabling highly reliable transmission to be performed even in noisy environments. Its main features are listed below. * * * * * * Operates on a single 5 V power supply. Three-state output On-chip fail-safe ci...
Description Quadruple Differential Line Receivers With 3 State Outputs
Line Receiver, 5V, 4-Channel, SOP

File Size 85.13K  /  15 Page

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